1. PECVD SiRN as a protection layer for TimePix chip
Violeta Prodanovic, Else Kooi Laboratory
We used Novellus Concept 1 multi station PECVD system for deposition of SiRN on TP chip (W12H6).
Metal shield is replaced by 1mm thick carrier wafer with a pocket slightly larger than the chip. Bond pad area is then covered with polyimide tape (Kapton® Polyimide Film, 3M™ Tape 5413 ).
Using the tape requires thorough cleaning procedure of the chip after deposition of protective layer: (99% HNO3 + acetone + IPA + rinsing)
Loadlock brings wafer cassette from horizontal to vertical position and vice versa
4.3 um of SiRN
Previously used metal shield protected bond pad area from SiRN deposition
SEM picture of SiRN on Si substrate

2. PECVD SiRN as a protection layer for TimePix chip
Violeta Prodanovic, Else Kooi Laboratory
Part of active area remained bare! To avoid this a roof out of cut silicon piece can be introduced.
Temperature of deposition is 400 ℃. Parameters are set so the highest refractive index possible is obtained (higher content of Si).
Measured stress = -300 MPa
Measured resistivity < 1011 Ohm m
This process was partly successful for the single chip we wanted to cover, but…
PITFALLS:
Not ellegant method (stains on bond pad area and non-covered active parts)
Processing of 8’’ wafers is not possible in this system!
Voids and other defect centers in the layer?
Red line represents refractive index of used SiRN