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Status of “Hardware in the Loop Simulation Environment” Project

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Presentation on theme: "Status of “Hardware in the Loop Simulation Environment” Project"— Presentation transcript:

1 Status of “Hardware in the Loop Simulation Environment” Project
(aka “5th quadrant” project) Rodrigo Améstica Alejandro Sáez, Tzu-Chiang Shen

2 Hybrid Approach Loads Software/ Firmware Layers

3 5th Quadrants Alternatives
*please read “5thQuadrant-summary-amestica.pdf” for details

4 5th Quadrant racks layout
1 BBPs, 64 correlator-antennas inputs architecture Only populated with electronics to process 16 correlator-antennas inputs To complete with Gaussian noise in the Correlator plane Same amount of data (signal + noise) will be transferred through to CDPNodes Arranged in a such way that cross-bar related features can be exercised. In total of 9 racks, could be downsized to racks

5 CDP Nodes, CCC From the hardware point of view
4 CDP nodes will be connected (as in production) 1 CCC will monitor hardware available in the single quadrant (*) 1 DMC will control 16 DRXs (as in production) Non-RT Simulation From the software point of view Same CDPNodes software layer in operation. Same CCC software layer (*) in operation. Same Correlator firmware in operation. Will generate binary data with full bandwidth to test TELCAL engines Quicklook will show meaningful plots Same SBs. Non-RT Simulation Non-RT Simulation

6 Antennas Connections Antennas could be located at AOS or OSF.
16 splitters will be installed at the AOS patch panel room. LORR will be installed to synchronize low frequency references signals: 125Mhz, TE (if PR is located at the AOS)

7 Summary of Additional Hardware
5th quadrant 4 CDP nodes 1 CCC 1 DMC 1 Engineering port computer 4 real antennas (including FE/BE devices) 4 sets of LLC/SAS 1 CRG/CRD 1 Photonic reference 9 Racks Computer room, power, cooling, etc

8 Cycle 5: Call for Project Proposals
✔ Notice of Intent: 2016/11/30 First draft to JAO management: 2016/12/23 Second draft to ICT: 2017/01/13 Project Proposal Deadline: 2017/01/31

9 Conclusion The ALMA software under testing is the same than the one running in the operation. All layers of software are exercised/tested before going to production. Test bench for testing hardware and firmware of Correlator (same version of firmware as operation) Provide enough time to reproduce complex problems and to verify the fixes provided by developers. Platform can be used to validate the compatibility of next generation of Correlator hardware Validate modifications of procedures in the production environment Become a training environment, for hardware, software engineers and operators. More stable software/firmware + better trained staff => less downtime in operation and less technical time => more scientific data Estimation: Increased observing time: % (to be cross checked with PRTS !!!!) Cost: ~ 0.2% of construction cost of ALMA Duration: ~ 2 years after funding approval.

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