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Name & Er. No.:- Patel Rashi I.( ) Patel Jinal B.( ) Patel Priya R.( )

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Presentation on theme: "Name & Er. No.:- Patel Rashi I.( ) Patel Jinal B.( ) Patel Priya R.( )"— Presentation transcript:

1 Name & Er. No.:- Patel Rashi I.( ) Patel Jinal B.( ) Patel Priya R.( ) Patel Nikita A.( ) Patel Varish J.( ) Patel Chirag B.( )

2 Topic:- Zero crossing detector Window detector Schmitt Trigger sample and hold ckt

3 Zero Crossing Detector:-
Circuit diagram:-

4 Circuit operation:- Zero crossing detector is as in fig. is nothing but the basic comparator circuit with a zero reference vtg applied to the non-inverting. Out put is –v(sat) for v(in)>0 and +v(sat) for v(in)<0

5 Input & output vtg waveform:-

6 When the input sine wave crosses zero and becomes positive at instant t=0, the differential input vtg v(d) becomes negative and the output vtg will to –v(sat). At the t=t/2 ,the differential input vtg becomes positive and the output voltage will swing to +v(sat) as now the (+) terminal is more positive than the (-) terminal.

7 The zero crossing detector thus switches its output from one state to the other every time when the input crosses the zero, The zero crossing detector is also known as a sine wave to square wave converter.

8 Window comparator:- Circuit diagram:-

9 Operation circuit:- The window detector ckt using two comparator is a shown fig. the ckt in unknown vtg v(in) ,reference voltage V(H) &V(L). If V(in) between two reference vtg i.e.; V(L)<V(in)<V(H) then the output of both comparator will be high. The output vtg will be equal to V(cc) V(0)=+V(cc); for V(L)<V(in)<V(H)

10 This will output vtg comparator it two low condition:-
(1)V(0)=V(CE)=low;for V(in)<V(L) (2) V(0)=V(CE)=low ;for V(in)>V(H) Conclusion:- a high o/p vtg indicate that the i/p vtg within the window where a low o/p vtg indicates that the i/p vtg is out of the window.

11 Input & output vtg waveform:-
.

12 Schmitt Trigger:- Schmitt Trigger is also called Regenerative Comparator. The comparator which use the positive feedback is known as the Schmitt trigger or negeneration comparator. Types of Schmitt Trigger:- Inverting Schmitt trigger Non-inverting Schmitt trigger

13 Inverting Schmitt trigger:-
.

14 Operation of circuit:-
In Schmitt trigger the reference vtg is V1 is vtg developed across R2,this reference vtg is not fixed but its amplitude and sign depend on the o/p vtg V1={R2/R1+R2}*V(0) two diff.trigger vtg are defined below team:- Upper threshold voltage(UTV) Lower threshold Voltage(LTV)

15 The upper trigger and lower trigger level is same to +V(sat) to –V(sat)

16 Input & output vtg inverting Schmitt trigger waveform:-

17 Transfer characteristic of inverting Schmitt trigger:-

18 Hysteresis voltage V(hv):-
The loop gain and Hysteresis of the Schmitt trigger is therefore depends on the values of resistor R1 &R2 and the value of V(sat) of the OP-APM.

19 Non-Inverting Schmitt trigger:-
Circuit diagram:-

20 The exranl i/p signal is being applied to non- inverting (+) terminal of the OP-APM and two resistor R1&R2 are connected a positive feedback. The Upper trigger & Lower trigger in which same value V(in) in that V1=0 and o/p transition from +V(sat) to –V(sat). Applying the superposition theorm,then voltage equation then;

21 The UTV <V equation below;

22 Input & output vtg non-inverting Schmitt trigger waveform:-

23 Hysteresis voltage V(hv):-

24 Effect of Hysteresis:-
Hysteresis improves the noise immunity. It reduces the response time. Increased Hysteresis will make the sensitivity poor. Hysteresis reduces the possibility of false triggering produced by noise.

25 Sample and Hold circuit:-
Circuit diagram:-

26 The sample and hold circuit in fig
The sample and hold circuit in fig. show that using an op-amp with an E-MOSFET. in this ckt the E- MOSFET work as a switch that is controlled by the sample and hold control vtg V(s) and capacitor stroge a energy. On the when, V(s) is zero, the E-MOSFET is off and open switch, then i/p resistance of op-amp vtg follower is also very high. The time periods T(H) of V(s) during which the vtg across the capacitior is constant are called hold periods. In the application in a high speed op-amp is helpful

27 Input & output vtg waveform:-

28 Used a sample-hold circuit:-
A signification reduction in size & improved can be using that a designed sample and hold IC such the LF398. LF398 in required only an external storage capacitor. That used in digital interfacing and communication such as a analog to digital. Used to pulse modulation system.

29 THANK YOU…..


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