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Combinational Circuits

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Presentation on theme: "Combinational Circuits"— Presentation transcript:

1 Combinational Circuits
Dr. Ahmad Almulhem Dr Khaled Mostafa Presented by Dr Emad Nabil Lec8

2 Objectives Types of Logic Circuits Designing Combinational Circuits
Sequential Designing Combinational Circuits Procedure Examples Arithmetic Circuits Half Adder Full Adder Binary Subtractor/Adder Ahmad Almulhem, KFUPM 2010

3 Combinational Circuits
Two classes of logic circuits: Combinational Circuits Sequential Circuits A Combinational circuit consists of logic gates Output depends only on input A Sequential circuit consists of logic gates and memory Output depends on current inputs and previous ones (stored in memory) Memory defines the state of the circuit. Ahmad Almulhem, KFUPM 2010

4 Combinational Circuits
n inputs m outputs A combinational circuit has: n Boolean inputs (1 or more), m Boolean outputs (1 or more) logic gates mapping the inputs to the outputs Ahmad Almulhem, KFUPM 2010

5 Designing Combinational Circuits
How to design a combinational circuit? Use all the information and tools you learned Binary system, Boolean Algebra, K-Maps, etc. Follow the step-by-step procedure given next Ahmad Almulhem, KFUPM 2010

6 Design Procedure Specification Formulation Optimization
Write a specification for the circuit if one is not already available Specify/Label input and output Formulation Derive a truth table or initial Boolean equations that define the required relationships between the inputs and outputs, if not in the specification Apply hierarchical design if appropriate Optimization Apply 2-level and multiple-level optimization (Boolean Algebra, K-Map, software) Draw a logic diagram for the resulting circuit using ANDs, ORs, and inverters Technology Mapping Map the logic diagram to the implementation technology selected (e.g. map into NANDs) Verification Verify the correctness of the final design manually or using simulation programs (such as Atanua and DigitalWorks) Practical Considerations: Cost of gates (Number) Maximum allowed delay Fanin (Num. of Inputs to a gate) Fanout (Num. of gates the output is connected to) Ahmad Almulhem, KFUPM 2010

7 Example 1 Question: Design a circuit that has a 3-bit input and a single output (F) specified as follows: F = 0, when the input is less than (5)10 F = 1, otherwise Solution: Step 1 (Specification): Label the inputs (3 bits) as X, Y, Z X is the most significant bit, Z is the least significant bit The output (1 bit) is F: F = 1  (101)2, (110)2, (111)2 F = 0  other inputs Ahmad Almulhem, KFUPM 2010

8 AND-OR => NAND-NAND
Example 1 (cont.) Step 2 (Formulation) Obtain Truth table Step 3 (Optimization) X YZ 1 X Y Z F 1 F = XZ + XY Circuit Diagram AND-OR => NAND-NAND X Z Y F Ahmad Almulhem, KFUPM 2010

9 Example 2- Adder Design an Adder for 1-bit numbers?
1. Specification: 2 inputs (X,Y) 2 outputs (C,S) 2. Formulation: 3. Optimization/Circuit X Y C S 1

10 Example 2- Half Adder (H.A.)
This adder is called a Half Adder Q: Why? Because it can’t add a 3rd bit (a carry) from a previous addition operation X Y C S 1

11 Example 3- Full Adder (F.A.)
A combinational circuit that adds 3 input bits to generate a Sum bit and a Carry bit X Y Z C S 1 X YZ 1 Sum S = X’Y’Z + X’YZ’ + XY’Z’ +XYZ = X  Y  Z X YZ 1 Carry C = XY + YZ + XZ

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13 Full Adder C=C0+C1 S0 _______ Z + S1 C C0 X Y + ______ S0 C0 X + C1

14 Full Adder = 2 Half Adders
By Truth Table: Direct Full Adder X Y Z C0 S0 C1 S1 1 X Y Z C S 1

15 Full Adder = 2 Half Adders
Sum and Carry Equations: From Direct Full Adder: S = X  Y  Z C = XY + XZ + YZ By Manipulating the Equations From 2 Half Adders: S = ( X  Y )  Z C = XY + Z(X  Y)

16 Full Adder = 2 Half Adders
Sum and Carry Equations: From Direct Full Adder: S = X  Y  Z C = XY + XZ + YZ By Manipulating the Equations From 2 Half Adders: S = ( X  Y )  Z C = XY + Z(X  Y)

17 Full Adder = 2 Half Adders
From Direct Full Adder: S = X  Y  Z C = XY + XZ + YZ From 2 Half Adders: S = ( X  Y )  Z C = XY + Z(X  Y) The Proof.. C = XY + XZ + YZ = XY + XZ(Y+Y’) + YZ(X+X’) = XY + XYZ+XZY’ + XYZ+YZX’ = XY + XYZ+XZY’ + YZX’ = XY( 1 + Z) + Z(XY’ + X’Y) = XY + Z(X  Y ) Remember : (X Y )= xy’ +x’y

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20 Example 4- binary subtractor using 2’s Complement
How the 2’s complement is calculated? Get 1’s complement, then add 1 => Use Not gates, and input 1 as carry in to the first adder!

21 Subtraction using 2’s Complement
Example: 9 -3 + 1’s ( ) 2’s ( ) +

22 Subtraction (2’s Complement)
Two’s complement = one’s complement +1 S = A-B=A + ( -B)= A+B’+1 1 Ahmad Almulhem, KFUPM 2010

23 Example 5 -Adder/Subtractor
How to build a circuit that performs both addition and subtraction? => Use XOR instead of NOT When X = 0, the output is Y When X = 1, the output is Y’ X Y Z=XY 1

24 Using full adders and XOR we can build an Adder/Subtractor!
Ahmad Almulhem, KFUPM 2010

25 Conclusion There are two types of logic circuits Design Procedure
Combinational Sequential Design Procedure Specification * Formulation * Optimization * Technology Mapping Verification Examples Ahmad Almulhem, KFUPM 2010


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