1. CPU How computers work Address bus Data bus Control bus A ALU B PC: C
B  A
A  [6]
AA+B
[7]A 1 2 3 4 5 6 7
31h
C4h
26h
81h
EAh 0h 5h 31
CPU
Logic circuit
Address bus
Data bus
Control bus
Write
Read
ALU B A D C
registers
PC: 1
I/O 16
I/O 17
I/O 18
I/O n
Inst. Dec.

2. CPU How computers work 17 Address bus Data bus Control bus A ALU B PC:
B  A
A  [6]
AA+B
[7]A 1 2 3 4 5 6 7
31h
C4h
26h
81h
EAh 0h 5h
CPU 17
Logic circuit
Address bus
Data bus
Control bus
Write
Read
ALU B A D C
registers
PC: 1 9
I/O 16
I/O 17
I/O 18
I/O n
Inst. Dec. 31

3. CPU How computers work 17 Address bus Data bus Control bus A ALU B PC:
C4h
26h
81h
EAh 0h 5h
A [17]
B  A
A  [6]
AA+B
[7]A 1 2 3 4 5 6 7 C4 26 5
CPU 17 6
Logic circuit
Address bus
Data bus
Control bus
Write
Read 9 9
ALU B A D C
registers
PC: 2 1 2 3 1
I/O 16
I/O 17
I/O 18
I/O n
Inst. Dec.

4. CPU How computers work Address bus Data bus Control bus ALU B A D C1 2 3 4 5 6 7
31h
C4h
26h
81h
EAh 0h 5h
A [17]
B  A
A  [6]
AA+B
[7]A 81 EA
CPU 7
Logic circuit
Address bus Eh
Data bus
Control bus
Write
Read 5 5 E
ALU B A D C
registers + E 9 9
PC: 5 4 4 3 3
I/O 16
I/O 17
I/O 18
I/O n
Inst. Dec.

5. How Instruction decoder works
Opcode
Operand
Opcode
Operand
Instruction
Instruction
Operation Code
Meaning
000
A  x
001
A  [x]
010
A  A – register (x)
011
A  A + x
100
A  A + register (x)
101
A  A – x
110
Register (xH)  Register (xL)
111
[x]  A 1 2 3 4 5 6 7
31h
C4h
26h
81h
EAh 0h 5h
A [17]
B  A
A  [6]
AA+B
[7]A
17 = 10001b