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KCS 2016 Multilevel Resistive Switching Memory based on Two-Dimensional (2D) Nanomaterials Gwang Hyuk Shin, Byung Chul Jang, Myung Hun Woo, and Sung-Yool.

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Presentation on theme: "KCS 2016 Multilevel Resistive Switching Memory based on Two-Dimensional (2D) Nanomaterials Gwang Hyuk Shin, Byung Chul Jang, Myung Hun Woo, and Sung-Yool."— Presentation transcript:

1 KCS 2016 Multilevel Resistive Switching Memory based on Two-Dimensional (2D) Nanomaterials Gwang Hyuk Shin, Byung Chul Jang, Myung Hun Woo, and Sung-Yool Choi School of Electrical Engineering and Graphene Research Center, KAIST J_1049 ABSTRACT We demonstrated a multilevel resistive switching memory based on Graphene oxide (GO) embedded with MoS2 nano-sheets. The stacks of GO/MoS2/GO were successfully fabricated by simple spin-coating process. This structure results in excellent non-volatile memory characteristics at least 4 multiple resistance states. Furthermore, switching mechanism was revealed by space charge limited conduction theory (SCLC). I. Introduction III. Results & Discussion Resistive switching memory (RRAM) has attracted much attention as next generation non-volatile memory due to outstanding performance as well as simple fabrication process. Especially, multilevel cell application (MLC) is one of the most important challenges for practical application. We demonstrated a multilevel resistive switching memory using Graphene oxide (GO) thin film and MoS2 nanosheets. The stack of GO/MoS2/GO was obtained by convenient spin-coating process using two dimensional nanomaterial solution of GO and MoS2 prepared from modified Hummers method and Li-intercalated chemical exfoliation, respectively. Surprisingly, a novel combination of GO thin film and MoS2 nanosheets make it possible to be multiple resistance states. Furthermore, we investigated systematically the switching mechanism using space charge limited conduction (SCLC) theory by means of charge trapping effect originated from different energy level between GO and MoS2. Fig. 3. An excellent multilevel switching characteristics Multilevel switching characteristic was demonstrated by discrete input bias with SET voltage of -4V and RESET voltage of 3.5V, 3.7V, and 4.0V. Bottom Voltage-time plot represent the input voltage scheme. Top Current-time plot show the measured output current Current states was decoded by 00, 01, 10, 11 indicating 2bits operation in single cell. High-density of storage-capacity was effectively achieved. (a) (b) Fig. 1. Typical multilevel I-V curve of Au/GO/MoS2/GO/Al memory. Inset figure shows the schematic diagram of 5 x 5 cross bar array of our device. Multilevel was realized by controlling the maximum voltage of RESET in negative differential resistance region (NDR). II. Device Characterization (a) (b) (c) (d) Fig. 4. Figure (a) illustrates The energy band diagram of the device. Figure (b) shows the double-logarithmic plot of typical I-V curve exhibiting the charge carrier transport mechanism by SCLC. Figure (a) illustrates the energy band diagram of the Au/GO/MoS2/GO/Al stacks. The work function and of the GO and MoS2 was measured by UPS. The energy band gap of the GO was confirmed by tauc plot using UV-Vis spectra Figure (b) shows the double logarithmic plot of typical I-V curve The slopes in the double logarithmic plot represents the transport mechanism. The charge carrier was transported by SCLC mechanism originated from space charge in MoS2 deep traps. IV. Conclusion In summary, we demonstrated a multilevel resistive switching memory based on 2D nanomaterials of GO and MoS2. The stacks of GO/MoS2/GO results in excellent memory characteristics. Furthermore, switching mechanism was systematically investigated by SCLC mechanism. We believe that the proposed strategy of stacking 2D layered materials hold promise for high density of storage capacity application Fig. 2. Characterization of the device. Figure (a), (b), and (c) show a SEM image, EDS spectrum, and AFM image of spin-coated MoS2 on GO thin film. Figure (d) represents a cross-sectional TEM image of the device. Acknowledgements We fabricated the stacks of GO/MoS2/GO using only spin-coating process. Figure (a) shows the SEM image with back scattered electron mode. At white spot in SEM image, the MoS2 was detected as shown in Figure (b). The thickness of MoS2 nanosheet was about 3nm as shown in AFM line profile plot. Figure (d) exhibits the cross-sectional bright field TEM image of the device. This work was supported by the Global Frontier Center for Advanced Soft Electronics ( ), the Creative Research Program of the ETRI (13ZE1110), and KI Research Project. MNDL (Molecular & Nano Device Lab.), School of Electrical Engineering and Graphene Research Center, KAIST 291 Daehak-ro, Yuseong-gu, Daejeon, , Korea * Phone: , 3477 Fax:


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