The x86 microprocessor Assembly language programming

The x86 microprocessor Assembly language programming
Module-1 The x86 microprocessor Assembly language programming

Punishable PLEASE SWITCH OFF THE PHONE/MOBILE.

Books Referred Muhammad Ali Mazidi, Janice Gillispie Mazidi, Danny Causey, The x86 PC Assembly Language Design and Interfacing, 5th Edition, Pearson, 2013. Barry B Brey, The Intel Microprocessors, 8th Edition, Pearson Education, 2009.

Prerequisites 15CS32 Analog and Digital Electronics
15CS34 Computer Organization

Course Outcomes CO244.1 Recall the Number System, flip-flops, register, counters, memory, DAC, basic working of diodes and transistors. CO244.2 Illustrate the knowledge about Microprocessor, inside the 8088/86 microprocessor, Assembly language programming, x86 Instructions sets description, INT 21H and INT 10H Programming, Memory and Memory interfacing, 8255 I/O programming, RISC and CISC Architectures, The ARM Architecture, ARM development tools. ARM Assembly language Programming, Cortex-M3 series block diagram and Embedded C Programming for ARM7. CO244.3 Apply the basic knowledge in x86 PC’s, programming and interfacing, C Programs for ARM microprocessor in KEIL. CO244.4 Analyze the Program Segments, The Stack, Flag register, x86 Addressing Modes, The ARM programmer’s model and General purpose registers, CPSR, SPSR, ARM memory map, data format, load and store architecture. CO244.5 Compare the microprocessors and microcontrollers, RISC and CISC Architectures. CO244.6 Adapt the assembly language programming in programming and interfacing the 8255 with x86, Interfacing ARM7TDMI/ Cortex-M3 to LCD, Keyboard, DAC, sensors and Stepper motor.

What is a Microprocessor?
The word comes from the combination micro and processor. Processor means a device that processes whatever. In this context processor means a device that processes numbers, specifically binary numbers, 0’s and 1’s. To process means to manipulate. It is a general term that describes all manipulation. Again in this content, it means to perform certain operations on the numbers that depend on the microprocessor’s design.

What about micro? Micro is a new addition.
In the late 1960’s, processors were built using discrete elements. These devices performed the required operation, but were too large and too slow. In the early 1970’s the microchip was invented. All of the components that made up the processor were now placed on a single piece of silicon. The size became several thousand times smaller and the speed became several hundred times faster. The “Micro”Processor was born.

Definition of the Microprocessor
The microprocessor is a programmable device that takes in numbers, performs on them arithmetic or logical operations according to the program stored in memory and then produces other numbers as a result.

Definition (Contd.) Lets expand each of the underlined words:
Programmable device: The microprocessor can perform different sets of operations on the data it receives depending on the sequence of instructions supplied in the given program. By changing the program, the microprocessor manipulates the data in different ways. Instructions: Each microprocessor is designed to execute a specific group of operations. This group of operations is called an instruction set. This instruction set defines what the microprocessor can and cannot do.

Definition (Contd.) Takes in: The data that the microprocessor manipulates must come from somewhere. It comes from what is called “input devices”. These are devices that bring data into the system from the outside world. These represent devices such as a keyboard, a mouse, switches, and the like.

Definition (Contd.) Numbers: The microprocessor has a very narrow view on life. It only understands binary numbers. A binary digit is called a bit (which comes from binary digit). The microprocessor recognizes and processes a group of bits together. This group of bits is called a “word”. The number of bits in a Microprocessor’s word, is a measure of its “abilities”.

Definition (Contd.) Words, Bytes, etc.
The earliest microprocessor (the Intel 8088 and Motorola’s 6800) recognized 8-bit words. They processed information 8-bits at a time. That’s why they are called “8-bit processors”. They can handle large numbers, but in order to process these numbers, they broke them into 8-bit pieces and processed each group of 8-bits separately. Later microprocessors (8086 and 68000) were designed with 16-bit words. A group of 8-bits were referred to as a “half-word” or “byte”. A group of 4 bits is called a “nibble”. Also, 32 bit groups were given the name “long word”. Today, all processors manipulate at least 32 bits at a time and there exists microprocessors that can process 64, 80, 128 bits or more at a time.

Definition (Contd.) Arithmetic and Logic Operations:
Every microprocessor has arithmetic operations such as add and subtract as part of its instruction set. Most microprocessors will have operations such as multiply and divide. Some of the newer ones will have complex operations such as square root. In addition, microprocessors have logic operations as well. Such as AND, OR, XOR, shift left, shift right, etc. Again, the number and types of operations define the microprocessor’s instruction set and depends on the specific microprocessor.

Definition (Contd.) Program: A program is a sequence of instructions that bring data into the microprocessor, processes it and sends it out. There are many programming languages (C, C++, FORTRAN, and JAVA…) However, these programming languages can be grouped into three main levels (these days a fourth level is developing).

Definition (Contd.) Programming Languages Machine language
Machine language is the lowest level programming language. It is a language intended to be understood by the microprocessor (the machine) only. In this language, every instruction is described by binary patterns. e.g may mean This is the form in which instructions are stored in memory. This is the only form that the microprocessor understands.

Definition (Contd.) Programming Languages Assembly language
This language is more understandable by humans. In this language, the binary patterns are assigned mnemonics (short abbreviated names). e.g. “Add 1,2” is assigned to the machine language pattern mentioned above to refer to the operation 1+2. There is usually one assembly language instruction for each machine language instruction.

Definition (Contd.) Programming Languages High level languages
These are languages like C, PASCAL and FORTRON. These are more natural for humans to use than assembly or machine languages. They are also more compact (i.e. it takes less statements to write the program). One high level instruction translates into many assembly or machine language instructions. e.g. x = y + z may translate into: MOV 1000, R1 MOV 1004, R2 ADD R1, R2 MOV R1, 1008

Definition (Contd.) Programming Languages
The new level being developed: is ultra high level languages which would contain things like C++, and JAVA. Here a single instruction may translate into hundreds of assembly or machine language instructions.

Definition (Contd.) Stored in memory : First, what is memory?
Memory is the location where information is kept while not in current use. Memory is a collection of storage devices. Usually, each storage device holds one bit. Also, in most kinds of memory, these storage devices are grouped into groups of 8. These 8 storage locations can only be accessed together. So, one can only read or write in terms of bytes to and form memory. Memory is usually measured by the number of bytes it can hold. It is measured in Kilos, Megas and lately Gigas. A Kilo in computer language is 210 =1024. So, a KB (KiloByte) is 1024 bytes. Mega is 1024 Kilos and Giga is 1024 Mega.

Definition (Contd.) Stored in memory:
When a program is entered into a computer, it is stored in memory. Then as the microprocessor starts to execute the instructions, it brings the instructions from memory one at a time. Memory is also used to hold the data. The microprocessor reads (brings in) the data from memory when it needs it and writes (stores) the results into memory when it is done.

Definition (Contd.) Produces: For the user to see the result of the execution of the program, the results must be presented in a human readable form. The results must be presented on an output device. This can be the monitor, a paper from the printer, a simple LED or many other forms.

A Microprocessor-based system
From the above description, we can draw the following block diagram to represent a microprocessor-based system: Input Output Microprocessor Memory

Inside The Microprocessor
Internally, the microprocessor is made up of 3 main units. The Arithmetic/Logic Unit (ALU) The Control Unit. An array of registers for holding data while it is being manipulated.

Organization of a microprocessor-based system
Let’s expand the picture a bit. I/O Input / Output Register Array ALU System Bus Control Memory ROM / RAM

The x86 microprocessor

OBJECTIVES Describe the Intel family of microprocessors from 8085 to Pentium. In terms of bus size, physical memory & special features. Explain the function of the EU (execution unit) and BIU (bus interface unit). Describe pipelining and how it enables the CPU to work faster. List the registers of the 8086. Code simple MOV and ADD instructions. Describe the effect of these instructions on their operands. State the purpose of the code segment, data segment, stack segment, and extra segment. Explain the difference between a logical address and a physical address.

OBJECTIVES Describe the "little endian" storage convention of x86 microprocessors. State the purpose of the stack. Explain the function of PUSH and POP instructions. List the bits of the flag register and briefly state the purpose of each bit. Demonstrate the effect of ADD instructions on the flag register. List the addressing modes of the 8086 and recognize examples of each mode. Know how to use flowcharts and pseudocode in program development.

BRIEF HISTORY OF THE x86 FAMILY
In 1978, Intel Corporation introduced the 16-bit 8086 microprocessor, a major improvement over the previous generation 8080/8085 series. The 8086 capacity of 1 megabyte of memory exceeded the 8080/8085 maximum of 64K bytes of memory. 8080/8085 was an 8-bit system, which could work on only 8 bits of data at a time. Data larger than 8 bits had to be broken into 8-bit pieces to be processed by the CPU. 8086 was a pipelined processor, as opposed to the nonpipelined 8080/8085.

The 8086 microprocessor has a 16-bit data bus, internally and externally. All registers are 16 bits wide, and there is a 16-bit data bus to transfer data in and out of the CPU There was resistance to a 16-bit external bus as peripherals were designed around 8-bit processors. A printed circuit board with a 16-bit data also bus cost more. As a result, Intel came out with the 8088 version. Identical to the 8086, but with an 8-bit data bus. Picked up by IBM as the microprocessor in designing the PC. The 8088-based IBM PC was an great success, because IBM & Microsoft made it an open system. Documentation and specifications of the hardware and software of the PC were made public Making it possible for many vendors to clone the hardware successfully & spawn a major growth in both hardware and software designs based on the IBM PC.

Intel introduced the in 1982, which IBM picked up for the design of the PC AT. 16-bit internal & external data buses. 24 address lines, for 16MB memory. (224 = 16MB) Virtual memory. 80286 can operate in one of two modes: Real mode - a faster 8088/8086 with the same maximum of 1 megabyte of memory. Protected mode - which allows for 16M of memory. Also capable of protecting the operating system & programs from accidental or deliberate destruction by a user. Virtual memory is a way of fooling the processor into thinking it has access to an almost unlimited amount of memory. By swapping data between disk storage and RAM.

In 1985 Intel introduced (or 80386DX). 32-bit internally/externally, with a 32-bit address bus. Capable of handling memory of up to 4 gigabytes. (232) Virtual memory increased to 64 terabytes. (246) Later Intel introduced 386SX, internally identical, but with a 16-bit external data bus & 24-bit address bus. This makes the 386SX system much cheaper. Since general-purpose processors could not handle mathematical calculations rapidly, Intel introduced numeric data processing chips. Math coprocessors, such as 8087, 80287, On the 80486, in 1989, Intel put a greatly enhanced & math coprocessor on a single chip. Plus additional features such as cache memory. Cache memory is static RAM with a very fast access time. All programs written for the 8088/86 will run on 286, 386, and 486 computers.

In 1992, Intel released the Pentium®. (not 80586) A name can be copyrighted, but numbers cannot. On release, Pentium® had speeds of 60 & 66 MHz. Designers utilized over 3 million transistors on the Pentium® chip using submicron fabrication technology. New design features made speed twice that of 80486/66. Over 300 times faster than that of the original 8088. Pentium® is fully compatible with previous x86 processors but includes several new features. Separate 8K cache memory for code and data. 64-bit bus, and a vastly improved floating-point processor.

The Pentium® is packaged in a 273-pin PGA chip BICMOS technology, combines the speed of bipolar transistors with power efficiency of CMOS technology 64-bit data bus, 32-bit registers & 32-bit address bus. Capable of addressing 4GB of memory. In 1995 Intel Pentium® Pro was released—the sixth generation x86. 5.5 million transistors. Designed primarily for 32-bit servers & workstations.

In 1997 Intel introduced the Pentium® II processor 7.5-million-transistor processor featured MMX (MultiMedia Extension) technology incorporated into the CPU. For fast graphics and audio processing. In 1998 the Pentium® II Xeon was released. Primary market is for servers and workstations. In 1999, Celeron® was released. Lower cost & good performance make it ideal for PCs used to meet educational and home business needs. In 1999 Intel released Pentium® III. 9.5-million-transistor processor. 70 new instructions called SIMD. Enhance video/audio performance in 3-D imaging, and streaming audio. In 1999 Intel introduced the Pentium® III Xeon. Designed more for servers and business workstations with multiprocessor configurations.

The Pentium® 4 debuted late in 1999. Speeds of 1.4 to 1.5 GHz. System bus operates at 400 MHz Completely new 32-bit architecture, called NetBurst. Designed for heavy multimedia processing. Video, music, and graphic file manipulation on the Internet. New cache and pipelining technology & expansion of the multimedia instruction set make the P4 a high-end media processing microprocessor. Intel has selected Itanium® as the new brand name for the first product in its 64-bit family of processors. Formerly called Merced. The evolution of microprocessors is increasingly influenced by the evolution of the Internet. Itanium® architecture is designed to meet Internet-driven needs for servers & high-performance workstations. Itanium® will have the ability to execute many instructions simultaneously, plus extremely large memory capabilities.

INSIDE THE 8088/86 There are two ways to make the CPU process information faster: Increase the working frequency. Using technology available, with cost considerations. Change the internal architecture of the CPU.

INSIDE THE 8088/86

INSIDE THE 8088/86 Pipelining
8085 could fetch or execute at any given time. The idea of pipelining in its simplest form is to allow the CPU to fetch and execute at the same time.

Intel implemented pipelining in 8088/86 by splitting the internal structure of the into two sections: The execution unit (EU) and the bus interface unit (BIU). These two sections work simultaneously. The BIU accesses memory and peripherals, while the EU executes instructions previously fetched. This works only if the BIU keeps ahead of the EU, so the BIU of the 8088/86 has a buffer, or queue The buffer is 4 bytes long in 8088 and 6 bytes in 8086. 8088/86 pipelining has two stages, fetch & execute. In more powerful computers, it can have many stages.

If an instruction takes too long to execute, the queue is filled to capacity and the buses will sit idle In some circumstances, the microprocessor must flush out the queue. When a jump instruction is executed, the BIU starts to fetch information from the new location in memory and information fetched previously is discarded. The EU must wait until the BIU fetches the new instruction In computer science terminology, a branch penalty. In a pipelined CPU, too much jumping around reduces the efficiency of a program.

INSIDE THE 8088/86 Registers In the CPU, registers store information temporarily. One or two bytes of data to be processed. The address of data. General-purpose registers in 8088/86 processors can be accessed as either 16-bit or 8-bit registers All other registers can be accessed only as the full 16 bits. In 8088/86, data types are either 8 or 16 bits To access 12-bit data, for example, a 16-bit register must be used with the highest 4 bits set to 0.

INSIDE THE 8088/86 Registers The bits of a register are numbered in descending order, as shown: The first letter of each register indicates its use. AX is used for the accumulator. BX is a base addressing register. CX is a counter in loop operations. DX points to data in I/O operations.

INSIDE THE 8088/86 Registers

INTRODUCTION TO ASSEMBLY PROGRAMMING
The CPU can work only in binary, very high speeds. It is tedious & slow for humans to deal with 0s & 1s in order to program the computer. A program of 0s & 1s is called machine language. Early computer programmers actually coded programs in machine language. Eventually, Assembly languages were developed, which provided mnemonics for machine code. Mnemonic is typically used in computer science and engineering literature to refer to codes & abbreviations that are relatively easy to remember. Assembly language is referred to as a low-level language because it deals directly with the internal structure of the CPU. Assembly language programs must be translated into machine code by a program called an assembler. To program in Assembly language, programmers must know the number of registers and their size. As well as other details of the CPU.

Today there are many different programming languages, such as C/C++, BASIC, C#, etc. Called high-level languages because the programmer does not have to be concerned with internal CPU details. High-level languages are translated into machine code by a program called a compiler. To write a program in C, one must use a C compiler to translate the program into machine language. There are numerous assemblers available for translating x86 Assembly language programs into machine code. One of the most commonly used assemblers is MASM by Microsoft. For debugging done using DEBUG provided with the Microsoft Windows operating system.

An Assembly language program consists of a series of lines of Assembly language instructions. An Assembly language instruction consists of a mnemonic, optionally followed by one or two operands. Operands are the data items being manipulated. Mnemonics are commands to the CPU, telling it what to do with those items. Two widely used instructions are mov & add.

The MOV instruction copies data from one location to another, using this format: This instruction tells the CPU to move (in reality, copy) the source operand to the destination operand. For example, the instruction "MOV DX,CX" copies the contents of register CX to register DX. After this instruction is executed, register DX will have the same value as register CX. E.g.

This program first loads CL with value 55H, then moves this value around to various registers inside the CPU. The use of 16-bit registers is shown here:

In the 8086 CPU, data can be moved among all the registers, as long as the source and destination registers match in size (Except the flag register.) There is no such instruction as "MOV FR,AX“. Code such as "MOV AL,DX" will cause an error. One cannot move the contents of a 16-bit register into an 8-bit register.

Important for instructions to use registers that are the same size. Never mix an 8-bit with a 16-bit register. This is not allowed by the microprocessor and results in an “error” when assembled

Using the MOV instruction, data can be moved directly into nonsegment registers only. The following demonstrates legal & illegal instructions.

Values cannot be loaded directly into any segment register (CS, DS, ES, or SS). To load a value into a segment register, load it to a nonsegment register, then move it to the segment register.

If a value less than FFH is moved into a 16-bit register, the rest of the bits are assumed to be zeros. For example, in "MOV BX,5" the result will be BX = 0005. BH = 00 and BL = 05. Moving a value that is too large into a register will cause an error.

The ADD instruction has the following format: ADD tells the CPU to add the source & destination operands and put the result in the destination. To add two numbers such as 25H and 34H, each can be moved to a register, then added together: Executing the program above results in: AL = 59H (25H + 34H = 59H) and BL = 34H. The contents of BL do not change.

The program above can be written in many ways, depending on the registers used, such as: The program above results in DH = 59H and CL = 34H.

Is it necessary to move both data items into registers before adding them together? No, it is not necessary. In the case above, while one register contained one value, the second value followed the instruction as an operand. This is called an “immediate operand”.

An 8-bit register can hold numbers up to FFH. For numbers larger than FFH (255 decimal), a 16-bit register such as AX, BX, CX, or DX must be used. The following program can add 34EH & 6A5H: Running the program gives DX = 9F3H. (34E + 6A5 = 9F3) and AX = 34E.

Any 16-bit nonsegment registers could have been used to perform the action above: The general-purpose registers are typically used in arithmetic operations Register AX is sometimes referred to as the accumulator. If hexadecimal data begin with a letter (i.e. A - F), the assembler requires the data start with a 0. to represent a hexadecimal F2, 0F2H is used in assembly language

INTRODUCTION TO PROGRAM SEGMENTS
A typical Assembly language program consists of at least three segments: A code segment - which contains the Assembly language instructions that perform the tasks that the program was designed to accomplish. A data segment - used to store information (data) to be processed by the instructions in the code segment. A stack segment - used by the CPU to store information temporarily.

Origin and definition of the segment A segment is an area of memory that includes up to 64K bytes, and begins on an address evenly divisible by 16 (such an address ends in 0H) 8085 addressed a maximum of 64K of physical memory, since it had only 16 pins for address lines. (216 = 64K) Limitation was carried into 8088/86 design for compatibility. In 8085 there was 64K bytes of memory for all code, data, and stack information. In 8088/86 there can be up to 64K bytes in each category. The code segment, data segment, and stack segment.

Logical address and physical address In literature concerning 8086, there are three types of addresses mentioned frequently: The physical address - the 20-bit address actually on the address pins of the 8086 processor, decoded by the memory interfacing circuitry. This address can have a range of 00000H to FFFFFH. An actual physical location in RAM or ROM within the 1 MB memory range. The offset address - a location in a 64K-byte segment range, which can range from 0000H to FFFFH. The logical address - which consists of a segment value and an offset address.

Code segment To execute a program, 8086 fetches the instructions (opcodes and operands) from the code segment. The logical address of an instruction always consists of a CS (code segment) and an IP (instruction pointer), shown in CS:IP format. The physical address for the location of the instruction is generated by shifting the CS left one hex digit (or four bit position), then adding it to the IP. IP contains the offset address. The resulting 20-bit address is called the physical address since it is put on the external physical address bus pins.

Assume values in CS & IP as shown in the diagram: The offset address contained in IP, is 95F3H. The logical address is CS:IP, or 2500:95F3H. The physical address will be F3 = 2E5F3H

Calculate the physical address of an instruction: The microprocessor will retrieve the instruction from memory locations starting at 2E5F3.

Calculate the physical address of an instruction: Since IP can have a minimum value of 0000H and a maximum of FFFFH, the logical address range in this example is 2500:0000 to 2500:FFFF.

Calculate the physical address of an instruction: This means that the lowest memory location of the code segment above will be 25000H ( ) and the highest memory location will be 34FFFH ( FFFF).

Example of the lowest memory location (starting address) of the segment and the highest memory location (ending/last address).

What happens if the desired instructions are located beyond these two limits? The value of CS must be changed to access those instructions. Example 1-1 IfCS = 24F6H and IP = 634AH, show: (a) The logical address (b) The offset address and calculate: (c) The physical address (d) The lower range (e) The upper range of the code segment Solution: (a) 24F6:634A (b) 634A (c) 2B2AA (24F A) (d) 24F60 (24F ) (e) 34F5F (24F60 + FFFF)

Code segment logical/physical address In the next code segment, CS and IP hold the logical address of the instructions to be executed. The following Assembly language instructions have been assembled (translated into machine code) and stored in memory. The three columns show the logical address of CS:IP, the machine code stored at that address, and the corresponding Assembly language code. The physical address is put on the address bus by the CPU to be decoded by the memory circuitry.

Instruction "MOV AL,57" has a machine code of B057. B0 is the opcode and 57 is the operand.

Instruction "MOV AL,57" has a machine code of B057. B0 is the opcode and 57 is the operand. The byte at address 1132:0100 contains B0, the opcode for moving a value into register AL. Address 1132:0101 contains the operand to be moved to AL.

Data segment Assume a program to add 5 bytes of data, such as 25H, 12H, 15H, 1FH, and 2BH. One way to add them is as follows: In the program above, the data & code are mixed together in the instructions. If the data changes, the code must be searched for every place it is included, and the data retyped From this arose the idea of an area of memory strictly for data

In x86 microprocessors, the area of memory set aside for data is called the data segment. The data segment uses register DS and an offset value. DEBUG assumes that all numbers are in hex. No "H" suffix is required. MASM assumes that they are in decimal. The "H" must be included for hex data. The next program demonstrates how data can be stored in the data segment and the program rewritten so that it can be used for any set of data.

Assume data segment offset begins at 200H. The data is placed in memory locations: The program can be rewritten as follows:

The offset address is enclosed in brackets, which indicate that the operand represents the address of the data and not the data itself. If the brackets were not included, as in "MOV AL,0200", the CPU would attempt to move 200 into AL instead of the contents of offset address 200 decimal. This program will run with any set of data. Changing the data has no effect on the code.

If the data had to be stored at a different offset address the program would have to be rewritten A way to solve this problem is to use a register to hold the offset address, and before each ADD, increment the register to access the next byte. 8088/86 allows only the use of registers BX, SI, and DI as offset registers for the data segment The term pointer is often used for a register holding an offset address.

In the following example, BX is used as a pointer: The INC instruction adds 1 to (increments) its operand. "INC BX" achieves the same result as "ADD BX,1“ If the offset address where data is located is changed, only one instruction will need to be modified.

Data segment logical/physical address The physical address for data is calculated using the same rules as for the code segment. The physical address of data is calculated by shifting DS left one hex digit and adding the offset value, as shown in Examples 1-2, 1-3, and 1-4.

Example 1-3 If DS = 7FA2H and the offset is 438EH, (a) Calculate the physical address. (b) Calculate the lower range. (c) Calculate the upper range of the data segment. (d) Show the logical address. Solution: (a) 83DAEH (7FA E) (b) 7FA20H (7FA ) (c) 8FA1FH (7FA20 + FFFF) (d) 7FA2H:438EH

Example 1-4 Assume that the DS register is 578CH. To access a given byte of data at physical memory location 67F66H, does the data segment cover the range where the data is located? If not, what changes need to be made? Solution: No, since the range is 578C0H to 678BFH, location 67F66H is not included in this range. To access that byte, DS must be changed so that its range will include that byte.

Little endian convention Previous examples used 8-bit or 1-byte data. What happens when 16-bit data is used? The low byte goes to the low memory location and the high byte goes to the high memory address. Memory location DS:1500 contains F3H. Memory location DS:1501 contains 35H. (DS:1500 = F3 DS:1501 = 35) This convention is called little endian.

Big endian convention In the big endian method, the high byte goes to the low address. In the little endian method, the high byte goes to the high address and the low byte to the low address.

All Intel microprocessors and many microcontrollers use the little endian convention. Freescale (formerly Motorola) microprocessors, along with some other microcontrollers, use big endian.

Extra segment (ES) ES is a segment register used as an extra data segment. In many normal programs this segment is not used. Use is essential for string operations. Default 16-bit segment and offset combinations.

Memory map of the IBM PC For a program to be executed on the PC, DOS must first load it into RAM. The 20-bit address of 8088/86 allows 1MB (1024K bytes) of memory space with the address range 00000–FFFFF. During the design phase of the first IBM PC, engineers had to decide on the allocation of the 1-megabyte memory space to various sections of the PC. This memory allocation is called a memory map.

Of this 1 megabyte, 640K bytes from addresses 00000–9FFFFH were set aside for RAM 128K bytes A0000H– BFFFFH were allocated for video memory The remaining 256K bytes from C0000H–FFFFFH were set aside for ROM

More about RAM In the early 80s, most PCs came with 64K to 256K bytes of RAM, more than adequate at the time Users had to buy memory to expand up to 640K. The DOS operating system first allocates the available RAM on the PC for its own use and then lets the rest be used for applications such as word processors. Similarly managing RAM is left to Windows because... The amount of memory used by Windows varies. Different computers have different amounts of RAM. Memory needs of application packages vary. For this reason, we do not assign any values for the CS, DS, and SS registers. Such an assignment means specifying an exact physical address in the range 00000–9FFFFH, and this is beyond the knowledge of the user. Video RAM From A0000H to BFFFFH is set aside for video The amount used and the location vary depending on the video board installed on the PC

More about ROM C0000H to FFFFFH is set aside for ROM. Not all the memory in this range is used by the PC's ROM. 64K bytes from location F0000H–FFFFFH are used by BIOS (basic input/output system) ROM. Some of the remaining space is used by various adapter cards (such as the network card), and the rest is free. The 640K bytes from to 9FFFFH is referred to as conventional memory. The 384K bytes from A0000H to FFFFFH are called the UMB (upper memory block).

Function of BIOS ROM There must be some permanent (nonvolatile) memory to hold the programs telling the CPU what to do when the power is turned on This collection of programs is referred to as BIOS. BIOS stands for basic input-output system. It contains programs to test RAM and other components connected to the CPU. It also contains programs that allow Windows/DOS to communicate with peripheral devices. The BIOS tests devices connected to the PC when the computer is turned on and to report any errors.

THE STACK What is a stack? why is it needed?
The stack is a section of read/write memory (RAM) used by the CPU to store information temporarily. The CPU needs this storage area since there are only a limited number of registers. There must be some place for the CPU to store information safely and temporarily. The main disadvantage of the stack is access time. Since the stack is in RAM, it takes much longer to access compared to the access time of registers. Some very powerful (expensive) computers do not have a stack. The CPU has a large number of registers to work with.

THE STACK How stacks are accessed
The stack is a section of RAM, so there must be registers inside the CPU to point to it. The SS (stack segment) register. The SP (stack pointer) register. These registers must be loaded before any instructions accessing the stack are used. Every register inside the x86 can be stored in the stack, and brought back into the CPU from the stack memory, except segment registers and SP. Storing a CPU register in the stack is called a push. Loading the contents of the stack into the CPU register is called a pop.

The x86 stack pointer register (SP) points at the current memory location used as the top of the stack. As data is pushed onto the stack it is decremented. As data is popped off the stack into the CPU, it is incremented. When an instruction pushes or pops a general purpose register, it must be the entire 16-bit register. One must code "PUSH AX". There are no instructions such as "PUSH AL" or "PUSH AH".

The SP is decremented after the push is to make sure the stack is growing downward from upper addresses to lower addresses. The opposite of the IP. (instruction pointer) To ensure the code section & stack section of the program never write over each other, they are located at opposite ends of the RAM set aside for the program. They grow toward each other but must not meet. If they meet, the program will crash.

THE STACK pushing onto the stack
As each PUSH is executed, the register contents are saved on the stack and SP is decremented by 2. Example: Assuming that SP = 1236H, AX = 24B6H, DI = 85C2H, and DX = 5F93H, show the contents of the stack as each of the following instructions is executed: PUSH AX PUSH DI PUSH DX Solution:

For every byte of data saved on the stack, SP is decremented once. Since the push is saving the contents of a 16-bit register, it decrements twice.

In the x86, the lower byte is always stored in the memory location with the lower address. 24H, the content of AH, is saved in the memory location with the address AL is stored in location 1234.

THE STACK popping the stack
With every pop, the top 2 bytes of the stack are copied to the x86 CPU register specified by the instruction & the stack pointer is incremented twice. While the data actually remains in memory, it is not accessible, since the stack pointer, SP is beyond that point.

THE STACK popping the stack
Example Assuming that the stack is as shown below, and SP = 18FAH, show the contents of the stack and registers as each of the following instructions is executed: POP CX POP DX POP BX Solution

THE STACK logical vs physical stack address
The exact physical location of the stack depends on the value of the stack segment (SS) register and SP, the stack pointer. To compute physical addresses for the stack, shift left SS, then add offset SP, the stack pointer register. Windows/DOS assigns values for the SP and SS.

A few more words about x86 segments
Can a single physical address belong to many different logical addresses? Observe the physical address value of 15020H. Many possible logical addresses represent this single physical address: An illustration of the dynamic behaviour of the segment and offset concept in the 8086 CPU.

A few more words about x86 segments
When adding the offset to the shifted segment register results in an address beyond the maximum allowed range of FFFFFH, wrap-around will occur.

A few more words about x86 segments Overlapping of Segments
In calculating the physical address, it is possible that two segments can overlap.

Advantages of Segmented Memory
One program can work on several different sets of data. This is done by reloading register DS to a new value. Programs that reference logical addresses can be loaded and run anywhere in the memory: relocatable Segmented memory introduces extra complexity in both hardware in that memory addresses require two registers. They also require complexity in software in that programs are limited to the segment size Programs greater than 64 KB can be run on 8086 but the software needed is more complex as it must switch to a new segment. Protection among segments is provided (when available).

FLAG REGISTER Many Assembly language instructions alter flag register bits & some instructions function differently based on the information in the flag register. The flag register is a 16-bit register sometimes referred to as the status register. Although 16 bits wide, only some of the bits are used. The rest are either undefined or reserved by Intel.

FLAG REGISTER Six flags, called conditional flags, indicate some condition resulting after an instruction executes. These six are CF, PF, AF, ZF, SF, and OF. The remaining three, often called control flags, control the operation of instructions before they are executed.

FLAG REGISTER bits of the flag register
Flag register bits used in x86 Assembly language programming, with a brief explanation each: CF (Carry Flag) - Set when there is a carry out (or barrow in), from d7 after an 8-bit operation, or d15 after a 16-bit operation. Used to detect errors in unsigned arithmetic operations. PF (Parity Flag) - After certain operations, the parity of the result's low-order byte is checked. If the byte has an even number of 1s, the parity flag is set to 1; otherwise, it is cleared. AF (Auxiliary Carry Flag) - If there is a carry from d3 to d4 (Half Carry) of an operation, this bit is set; otherwise, it is cleared. Used by instructions that perform BCD (binary coded decimal) arithmetic.

FLAG REGISTER bits of the flag register
Flag register bits used in x86 Assembly language programming, with a brief explanation each: ZF (Zero Flag) - Set to 1 if the result of an arithmetic or logical operation is zero; otherwise, it is cleared. SF (Sign Flag) - Binary representation of signed numbers uses the most significant bit as the sign bit. After arithmetic or logic operations, the status of this sign bit is copied into the SF, indicating the sign of the result. TF (Trap Flag) - When this flag is set it allows the program to single-step, meaning to execute one instruction at a time. Single-stepping is used for debugging purposes. IF (Interrupt Enable Flag) - This bit is set or cleared to enable/disable only external maskable interrupt requests. DF (Direction Flag) - Used to control the direction of string operations. if DF=0 Autoincrement or if DF=1 Autodecrement of SI and/or DI register OF (Overflow Flag) - Set when the result of a signed number operation is too large, causing the high-order bit to overflow into the sign bit. Used only to detect errors in signed arithmetic operations.

FLAG REGISTER Flag register and ADD instruction
Flag bits affected by the ADD instruction: CF (carry flag); PF (parity flag); AF (auxiliary carry flag). ZF (zero flag); SF (sign flag); OF (overflow flag).

It is important to note differences between 8- and 16-bit operations in terms of impact on the flag bits. The parity bit only counts the lower 8 bits of the result and is set accordingly.

The carry flag is set if there is a carry beyond bit d15 instead of bit d7. Since the result of the entire 16-bit operation is zero (meaning the contents of BX), ZF is set to high.

Instructions such as data transfers (MOV) affect no flags.

FLAG REGISTER Use of the zero flag for looping
A widely used application of the flag register is the use of the zero flag to implement program loops. A loop is a set of instructions repeated a number of times.

As an example, to add 5 bytes of data, a counter can be used to keep track of how many times the loop needs to be repeated. Each time the addition is performed the counter is decremented and the zero flag is checked. When the counter becomes zero, the zero flag is set (ZF = 1) and the loop is stopped.

• Register CX is used to hold the counter. BX is the offset pointer. (SI or DI could have been used instead)

AL is initialized before the start of the loop In each iteration, ZF is checked by the JNZ instruction JNZ stands for "Jump Not Zero“, meaning that if ZF = 0, jump to a new address. If ZF = 1, the jump is not performed, and the instruction below the jump will be executed.

JNZ instruction must come immediately after the instruction that decrements CX. JNZ needs to check the effect of "DEC CX" on ZF. If any instruction were placed between them, that instruction might affect the zero flag.

x86 ADDRESSING MODES The CPU can access operands (data) in various ways, called addressing modes. The number of addressing modes is determined when the microprocessor is designed & cannot be changed The x86 provides seven distinct addressing modes: 1 - Register 2 - Immediate 3 - Direct 4 - Register indirect 5 - Based relative 6 - Indexed relative 7 - Based indexed relative

x86 ADDRESSING MODES Revisit Processor Register
15 8 7 AX BX CX DX AH AL BH BL CH CL DH DL Accumulator Base Counter Data SP BP SI DI Data Group Pointer and Index Group Stack Pointer Base Pointer Source Index Destination Index

x86 ADDRESSING MODES Rules to Remember
Never mix an 8-bit register with 16-bit, it is not allowed in microprocessor. Code segment register (CS) is never used as destination. Segment to segment MOV or any instruction is not allowed. Memory to memory transfer or ALU operation not allowed except string instructions. Name of the Symbol/Veriable Name should not same as instruction name. If hexadecimal data begin with a letter (i.e. A - F), the assembler requires the data start with a 0. to represent a hexadecimal F2, 0F2H is used in assembly language Above rule applied to any x86 instructions.

x86 ADDRESSING MODES Register addressing mode
Register addressing mode involves use of registers to hold the data to be manipulated. Memory is not accessed, so it is relatively fast. Examples of register addressing mode: The source & destination registers must match in size. Coding "MOV CL,AX" will give an error, since the source is a 16-bit register and the destination is an 8-bit register.

Memory Memory Address (In Hex) Data 10000 10001 10002 10003 10004 10005 10006 10007 10008 10009 1000A 1000B 1000C 1000D 1000E 1000F 10010 Example MOV BX,CX Processor Register AX AH AL BX BH BL CX CH CL DX DH DL SI DI BP SP CS DS SS ES +

Examples MOV AL,BL 8 bits Copies BL into AL MOV CH,CL 8 bits Copies CL into CH MOV AX,CX 16 bits Copies CX into AX MOV SP,BP 16 bits Copies BP into SP MOV DS,AX 16 bits Copies AX into DS MOV SI,DI 16 bits Copies DI into SI MOV BX,ES 16 bits Copies ES into BX MOV DS,CX 16 bits Copies CX into DS MOV ES,DS — Not allowed (segment-to-segment) MOV BL,DX — Not allowed (mixed sizes) MOV CS,AX — Not allowed (the code segment register may not be the destination register)

x86 ADDRESSING MODES Immediate addressing mode
In immediate addressing mode, as the name implies, when the instruction is assembled, the operand comes immediately after the opcode. The source operand is a constant. This mode can be used to load information into any of register except the segment and flag registers.

To move information to the segment registers, the data must first be moved to a general-purpose register, then to the segment register.

Memory Memory Address (In Hex) Data 10000 AAH 10001 BBH 10002 CCH 10003 EEH 10004 DDH 10005 10006 FFH 10007 11H 10008 22H 10009 33H 1000A 44H 1000B 55H 1000C 66H 1000D 77H 1000E 88H 1000F 99H 10010 12H Example MOV BL,44 MOV AX, 0DDCCH MOV NO1,10H Processor Register AX AH AL BX BH BL CX CH CL DX DH DL SI DI BP SP CS DS SS ES +

Examples MOV BL, bits Copies 44 decimal (2CH) into BL MOV AX,44H 16 bits Copies 0044H into AX MOV SI, bits Copies 0000H into SI MOV CH, bits Copies 100 decimal (64H) into CH MOV AL,’A’ 8 bits Copies ASCII A into AL MOV AH,1 8 bits Copies 1 decimal into AH MOV AX,’AB’ 16 bits Copies ASCII BA* into AX MOV CL, B 8 bits Copies binary into CL

x86 ADDRESSING MODES Direct addressing mode
In direct addressing mode, the data is in some memory location(s)(Symbolic Name/Variable). In most programs, the data to be processed is often in some memory location outside the CPU. The address of the data in memory comes immediately after the instruction.

The address of the operand is provided with the instruction, as an offset address. Calculate the physical address by shifting left the DS register and adding it to the offset: Note the bracket around the address. If the bracket is absent, executing the command will give an error, as it is interpreted to move the value 2400 (16-bit data) into register DL. An 8-bit register.

Finding Physical Address DS shift to left = 10000H + Offset (NO1) = H PA = 10004H Example DS= 1000H, NO1 offset = 0004H, NO1 data = DDH, MOV BX,NO1 Memory Address (In Hex) Data 10000 AAH 10001 BBH 10002 CCH 10003 EEH 10004 DDH 10005 10006 FFH 10007 11H 10008 22H 10009 33H 1000A 44H Processor Register AX AH AL BX BH BL CX CH CL DX DH DL SI DI BP SP CS DS SS ES +

x86 ADDRESSING MODES Register indirect addressing mode
In register indirect addressing mode, the address of the memory location where the operand resides is held by a register. The registers used for this purpose are SI, DI, and BX. If these three registers are used as pointers, they must be combined with DS in order to generate the 20-bit physical address. Notice that BX is in brackets. The physical address is calculated by shifting DS left one hex position and adding BX to it.

The same rules apply when using register SI or DI. Example 1-16 shows 16-bit data.

Example DS= 1000H, SI offset = 0004H MOV BL, [SI] Finding Physical Address DS shift to left = 10000H + Offset (SI) = H PA = 10004H Memory Address (In Hex) Data 10000 AAH 10001 BBH 10002 CCH 10003 EEH 10004 DDH 10005 10006 FFH 10007 11H 10008 22H 10009 33H 1000A 44H Processor Register AX AH AL BX BH BL CX CH CL DX DH DL SI DI BP SP CS DS SS ES +

Example

x86 ADDRESSING MODES Based relative addressing mode
In based relative addressing mode, base registers BX & BP, and a displacement/offset value, are used to calculate the effective address. Default segments used for the calculation of the physical address (PA) are DS for BX and SS for BP. Alternatives are "MOV CX,[BX+10]" or "MOV CX,10[BX]" Again the low address contents will go into CL and the high address contents into CH.

In the case of the BP register: Alternatives are "MOV AL,[BP+5]" or "MOV AL,5[BP]". BP+5 is called the effective address since the fifth byte from the beginning of the offset BP is moved to register AL.

Example DS= 1000H, BX offset = 0004H MOV AL, [BX]+5 or MOV AL, [BX+5] Finding Physical Address DS shift to left = 10000H + Offset (BX) = H Relative No. = H PA = 10009H Memory Address (In Hex) Data 10000 AAH 10001 BBH 10002 CCH 10003 EEH 10004 DDH 10005 10006 FFH 10007 11H 10008 22H 10009 33H 1000A 44H Processor Register AX AH AL BX BH BL CX CH CL DX DH DL SI DI BP SP CS DS SS ES +

x86 ADDRESSING MODES Indexed relative addressing mode
The indexed relative addressing mode works the same as the based relative addressing mode. Except that registers DI & SI hold the offset address.

x86 ADDRESSING MODES Indexed relative addressing mode
Example DS= 1000H, DI offset = 0004H MOV AL, [DI]+5 or MOV AL, [DI+5] Finding Physical Address DS shift to left = 10000H + Offset (DI) = H Relative No. = H PA = 10009H Memory Address (In Hex) Data 10000 AAH 10001 BBH 10002 CCH 10003 EEH 10004 DDH 10005 10006 FFH 10007 11H 10008 22H 10009 33H 1000A 44H Processor Register AX AH AL BX BH BL CX CH CL DX DH DL SI DI BP SP CS DS SS ES +

x86 ADDRESSING MODES Based indexed addressing mode
By combining based & indexed addressing modes, a new addressing mode is derived called the based indexed addressing mode. One base register and one index register are used. The coding of the instructions can vary.

Example DS= 1000H, BX offset= 0004H DI offset = 0002H MOV AL, [BX+DI]+3 or MOV AL, [BX+DI+3] Finding Physical Address DS shift to left = 10000H + Offset (BX) = H Offset (DI) = H Relative No. = H PA = 10009H Memory Address (In Hex) Data 10000 AAH 10001 BBH 10002 CCH 10003 EEH 10004 DDH 10005 10006 FFH 10007 11H 10008 22H 10009 33H 1000A 44H Processor Register AX AH AL BX BH BL CX CH CL DX DH DL SI DI BP SP CS DS SS ES +

Example

x86 ADDRESSING MODES Segment overrides
The x86 CPU allows the program to override the default segment and use any segment register. In "MOV AL,[BX]", the physical address of the operand to be moved into AL is DS:BX. To override that default, specify the desired segment in the instruction as "MOV AL,ES:[BX]“

x86 ADDRESSING MODES

Assembly Language Programming

OBJECTIVES Explain the difference between Assembly language instructions and pseudo-instructions. Identify the segments of an Assembly language program. Code simple Assembly language instructions. Assemble, link, and run a simple Assembly language program. Code control transfer instructions such as conditional and unconditional jumps and call instructions. Code Assembly language data directives for binary, hex, decimal, or ASCII data. Write an Assembly language program using either the simplified segment definition or the full segment definition. Explore the use of the MASM and emu8086 assemblers.

ASSEMBLY LANGUAGE An Assembly language program is a series of statements, or lines. Either Assembly language instructions, or statements called directives. Directives (pseudo-instructions) give directions to the assembler about how it should translate the Assembly language instructions into machine code. Assembly language instructions consist of four fields: [label:] mnemonic [operand/s][;comment] Brackets indicate that the field is optional. Do not type in the brackets.

DIRECTIVES AND A SAMPLE PROGRAM Assembly language instructions
[label:] mnemonic [operands][;comment] The label field allows the program to refer to a line of code by name. The label field cannot exceed 31 characters. A label must end with a colon when it refers to an opcode generating instruction.

[label:] mnemonic [operands][;comment] The mnemonic (instruction) and operand(s) fields together accomplish the tasks for which the program was written. The mnemonic opcodes are ADD and MOV. "AL,BL" and "AX,6764" are the operands Instead of a mnemonic and operand, these fields could contain assembler pseudo-instructions, or directives. Directives do not generate machine code and are used only by the assembler as opposed to instructions.

[label:] mnemonic [operands][;comment] Examples of directives are DB, END, PROC and ENDP.

[label:] mnemonic [operands][;comment] The comment field begins with a ";" and may be at the end of a line or on a line by themselves. The assembler ignores comments. Comments are optional, but highly recommended to make it easier to read and understand the program.

DIRECTIVES AND A SAMPLE PROGRAM Model definition
After the first two comments is the MODEL directive. This directive selects the size of the memory model.

Among the options for the memory model are SMALL, MEDIUM, COMPACT, and LARGE.

Among the options for the memory model are SMALL, MEDIUM, COMPACT, and LARGE. Memory Model Size of Code Size of Data TINY Code + Data < 64KB Code + data < 64KB SMALL Less than 64KB MEDIUM Can be more than 64KB Less than 64 KB COMPACT LARGE Can be more than 64K HUGE

DIRECTIVES AND A SAMPLE PROGRAM Segment definition
Every line of an Assembly language program must correspond to one an x86 CPU segment register. CS (code segment); DS (data segment). SS (stack segment); ES (extra segment). The simplified segment definition format uses three simple directives: ".CODE" ".DATA" ".STACK“ Which correspond to the CS, DS, and SS registers. The stack segment defines storage for the stack. The data segment defines the data the program will use. The code segment contains Assembly language instructions.

DIRECTIVES AND A SAMPLE PROGRAM Stack segment
This directive reserves 64 bytes of memory for the stack:

DIRECTIVES AND A SAMPLE PROGRAM Data segment
The data segment defines three data items: DATA1, DATA2, and SUM.

DIRECTIVES AND A SAMPLE PROGRAM Data segment
The DB directive is used by the assembler to allocate memory in byte-sized chunks. Each is defined as DB (define byte). Memory can be allocated in different sizes. Data items defined in the data segment will be accessed in the code segment by their labels. DATA1 and DATA2 are given initial values in the data section. SUM is not given an initial value. But storage is set aside for it.

DIRECTIVES AND A SAMPLE PROGRAM
Code segment definition The first line of the segment after the .CODE directive is the PROC directive.

A procedure is a group of instructions designed to accomplish a specific function. A code segment is organized into several small procedures to make the program more structured. Every procedure must have a name defined by the PROC directive or can use lable name. Followed by the assembly language instructions, and closed by the ENDP directive. The PROC and ENDP statements must have the same label. The PROC and ENDP directives are used to indicate the beginning and end of the procedure. The PROC directive may have the option (attribute) FAR or NEAR. The OS requires the entry point to the user program to be a FAR procedure.

Before the OS passes control to the program so it may execute, it assigns segment registers values. When the program begins executing, only CS and SS have the proper values. DS (and ES) values are initialized by the program.

AL & BL with DATA1 & DATA2, ADDs them together, and stores the result in SUM.

The last instructions, "MOV AH,4CH" & "INT 21H“ return control to the operating system.

The last two lines end the procedure & program. The label for ENDP(MAIN) matches the label for PROC.

It is handy to keep a sample shell & fill it in with the instructions and data for your program.

ASSEMBLE, LINK, AND RUN A PROGRAM
MASM & LINK are the assembler & linker programs. Many editors or word processors can be used to create and/or edit the program, and produce an ASCII file. The steps to create an executable Assembly language program are as follows:

The source file must end in ".asm“. The ".asm" file is assembled by an assembler, like MASM. The assembler will produce an object file and a list file, along with other files useful to the programmer. The extension for the object file must be ".obj". This object file is input to the LINK program, to produce the executable program that ends in ".exe". The ".exe" file can be run (executed) by the microprocessor.

Before feeding the ".obj" file into LINK, all syntax errors must be corrected. Fixing these errors will not guarantee the program will work as intended, as the program may contain conceptual errors (Logical error).

Figure shows how an executable program is created & run by following the steps outlined above.

PAGE and TITLE directives The PAGE directive, which tells the printer how the list should be printed, is formatted as: In default mode, the output will be 66 lines per page & 80 characters per line. In Text book, programs change the settings to 60 & 132. The range for number of lines is 10 to 255 and for columns is 60 to 132.

When the list is printed, the assembler can print the title of the program on top of each page. It is common to put the name of the program immediately after the TITLE pseudo-instruction. And a brief description of the function of the program. The text after the TITLE pseudo-instruction cannot be exceed 60 ASCII characters.

PAGE and TITLE directives .crf MASM produces another optional file, the cross reference, which has the extension ".crf". An alphabetical list of all symbols & labels in the program. Also program line numbers in which they are referenced.

LINKing the program The assembler (MASM) creates the opcodes, operands & offset addresses under the ".obj" file. The LINK program produces the ready-to-run program with the ".exe" (EXEcutable) extension. The LINK program sets up the file so it can be loaded by the OS and executed. The program can be run at the OS level, using the following command: C>myfile When the program name is typed in at the OS level, the OS loads the program in memory. Referred to as mapping, which means that the program is mapped into the physical memory of the PC.

LINKing the program .map When there are many segments for code or data, there is a need to see where each is located and how many bytes are used by each. This is provided by the optional .map file, which gives the name of each segment, where it starts, where it stops, and its size in bytes.

MORE SAMPLE PROGRAMS Program 2-1 that shows the list file generated when the program was assembled.

MORE SAMPLE PROGRAMS Analysis of Program 2-1
The commands used in running Program 2-1 were: (1) u, to unassemble the code from CS:0 for 19 bytes. (2) d, to dump the contents of memory from 1066:0 for the next F bytes. (3) g, to go. (run the program)

MORE SAMPLE PROGRAMS Program 2-1, explained instruction by instruction: "MOV CX,05" will load the value 05 into the CX register. Used by the program as a counter for iteration (looping). "MOV BX,OFFSET DATA_IN" will load into BX the offset address assigned to DATA_IN. The assembler starts at offset 0000 and uses memory for the data, then assigns the next available offset memory for SUM (in this case, 0005). "ADD AL,[BX]" adds the contents of the memory location pointed at by the register BX to AL. Note that [BX] is a pointer to a memory location. "INC BX" increments the pointer by adding 1 to BX. This will cause BX to point to the next data item. (next byte)

MORE SAMPLE PROGRAMS Program 2-1, explained instruction by instruction: "DEC CX" will decrement (subtract 1 from) the CX counter and set the zero flag high if CX becomes zero. "JNZ AGAIN" will jump back to the label AGAIN as long as the zero flag is indicating that CX is not zero. "JNZ AGAIN" will not jump only after the zero flag has been set high by the "DEC CX" instruction (CX becomes zero). When CX becomes zero, this means that the loop is completed and all five numbers have been added to AL.

MORE SAMPLE PROGRAMS various approaches to Program 2-1
Variations of Program 2-1 clarify use of addressing modes, and show that the x86 can use any general purpose register for arithmetic and logic operations.

MORE SAMPLE PROGRAMS analysis of Program 2-2
The 16-bit data (a word) is stored with the low-order byte first, referred to as "little endian."

MORE SAMPLE PROGRAMS The address pointer is incremented twice, since the operand being accessed is a word (two bytes). The program could have used "ADD DI,2" instead of using "INC DI" twice. "MOV SI,OFFSET SUM" was used to load the pointer for the memory allocated for the label SUM. "MOV [SI],BX" moves the contents of register BX to memory locations with offsets 0010 and 0011. Program 2-2 uses the ORG directive to set the offset addresses for data items. This caused SUM to be stored at DS:0010.

MORE SAMPLE PROGRAMS analysis of Program 2-3
Program 2-3 shows the data segment being dumped before and after the program was run.

MORE SAMPLE PROGRAMS C4 was coded in the data segments as 0C4.
Indicating that C is a hex number and not a letter. Required if the first digit is a hex digit A through F. This program uses registers SI & DI as pointers to the data items being manipulated. The first is a pointer to the data item to be copied. The second points to the location the data is copied to. With each iteration of the loop, both data pointers are incremented to point to the next byte.

CONTROL TRANSFER INSTRUCTIONS
FAR and NEAR In the sequence of instructions, it is often necessary to transfer program control to a different location. If control is transferred to a memory location within the current code segment, it is NEAR. Sometimes called intrasegment. (within segment) If control is transferred outside the current code segment, it is a FAR jump. Or intersegment. (between segments)

As the CS:IP registers always point to the address of the next instruction to be executed, they must be updated when a control transfer is executed. In a NEAR jump, the IP is updated and CS remains the same, since control is still inside the current code segment. In a FAR jump, because control is passing outside the current code segment, both CS and IP have to be updated to the new values.

conditional jumps Conditional jumps have mnemonics such as JNZ (jump not zero) and JC (jump if carry). In the conditional jump, control is transferred to a new location if a certain condition is met. The flag register indicates the current condition. For example, with "JNZ label", the processor looks at the zero flag to see if it is raised. If not, the CPU starts to fetch and execute instructions from the address of the label. If ZF = 1, it will not jump but will execute the next instruction below the JNZ.

Short jumps All conditional jumps are short jumps. The address of the target must be within -128 to +127 bytes of the IP. The conditional jump is a two-byte instruction. One byte is the opcode of the “J” condition. The second byte is a value between 00 and FF. An offset range of 00 to FF gives 256 possible addresses. In a jump backward, the second byte is the 2's complement of the displacement value

To calculate the target address, the second byte is added to the IP of the instruction after the jump. "JNZ AGAIN" was assembled as "JNZ 000D", and 000D is the address of the instruction with the label AGAIN. "JNZ 000D" has the opcode 75 and the target address FA.

This is followed by "MOV SUM,AL", which is located beginning at offset address 0013. The IP value of MOV,0013, is added to FA to calculate the address of label AGAIN, and the carry is dropped. FA is the 2's complement of -6.

Calculate a forward jump target address by adding the IP of the following instruction to the operand. The displacement value is positive, as shown. "JB NEXT" has the opcode 72, the target address 06 and is located at IP = 000A and 000B. The jump is 6 bytes from the next instruction, is IP = 000C. Adding gives us 000CH H = 0012H, which is the exact address of the NEXT label.

For conditional jumps, the address of the target address can never be more than -128 to +127 bytes away from the IP associated with the instruction following the jump. Any attempt is made to violate this rule will generate a "relative jump out of range" message.

Unconditional jumps An unconditional jump transfers control to the target location label unconditionally, in the following forms: SHORT JUMP - in the format "JMP SHORT label". A jump within -128 to +127 bytes of memory relative to the address of the current IP, opcode EB. NEAR JUMP - the default, has the format "JMP label". A jump within the current code segment, opcode E9. The target address can be any of the addressing modes of direct, register, register indirect, or memory indirect: Direct JUMP - exactly like the short jump. Except that the target address can be anywhere in the segment in the range to of the current IP.

An unconditional jump transfers control to the target location label unconditionally, in the following forms: Register indirect JUMP - target address is in a register. In "JMP BX", IP takes the value BX. Memory indirect JMP - target address is the contents of two memory locations, pointed at by the register. "JMP [DI]" will replace the IP with the contents of memory locations pointed at by DI and DI+1. FAR JUMP - in the format "JMP FAR PTR label“ register. A jump out of the current code segment IP and CS are both replaced with new values.

CALL statements The CALL (CALL lable_name) instruction is used to call a procedure, to perform tasks that need to be performed frequently. The target address could be in the current segment, in which case it will be a NEAR call or outside the current CS segment, which is a FAR call. The microprocessor saves the address of the instruction following the call on the stack. To know where to return, after executing the subroutine. In the NEAR call only the IP is saved on the stack. In a FAR call both CS and IP are saved.

Working Diagram:

For control to be transferred back to the caller, the last subroutine instruction must be RET (return). For NEAR calls, the IP is restored. For FAR calls, CS & IP are restored. • Assume SP = FFFEH: Since this is a NEAR call, only IP is saved on the stack. The IP address 0206, which belongs to the "MOV AX, 142F" instruction, is saved on the stack.

RET Statement The last instruction of the called subroutine must be a RET instruction that directs the CPU to POP the top 2 bytes of the stack into the IP and resume executing at offset address 0206. The number of PUSH and POP instructions (which alter the SP) must match. • For every PUSH there must be a POP.

assembly language subroutines

Rules for names in Assembly language The names used for labels in Assembly language programming consist of… Alphabetic letters in both upper- and lowercase. The digits 0 through 9. Question mark (?); Period (.); At Underline (_); Dollar sign ($) Each label name must be unique. They may be up to 31 characters long. The first character must be an alphabetic or special character. It cannot be a digit. The period can only be used as the first character. This is not recommended since later versions of MASM have several reserved words that begin with a period.

DATA TYPES AND DATA DEFINITION
x86 data types The 8088/86 processor supports many data types. Data types can be 8- or 16-bit, positive or negative. The programmer must break down data larger than 16 bits (0000 to FFFFH, or 0 to in decimal). A number less than 8 bits wide must be coded as an 8-bit register with the higher digits as zero. A number is less than 16 bits wide must use all 16 bits.

ORG origin ORG is used to indicate the beginning of the offset address. The number after ORG can be either in hex or in decimal. If the number is not followed by H, it is decimal and the assembler will convert it to hex.

DB define byte One of the most widely used data directives, it allows allocation of memory in byte-sized chunks. This is the smallest allocation unit permitted. DB can define numbers in decimal, binary, hex, & ASCII. D after the decimal number is optional. B (binary) and H (hexadecimal) is required. To indicate ASCII, place the string in single quotation marks. DB is the only directive that can be used to define ASCII strings larger than two characters. It should be used for all ASCII data definitions.

Some DB examples: Single or double quotes can be used around ASCII strings. Useful for strings, which should contain a single quote, such as "O'Leary".

List file for DB examples.

DUP duplicate DUP will duplicate a given number of characters. Two methods of filling six memory locations with FFH.

List file for DUP examples.

DW define word DW is used to allocate memory 2 bytes (one word) at a time: • List file for DW examples.

EQU equate EQU associates a constant value with a data label. When the label appears in the program, its constant value will be substituted for the label. Defines a constant without occupying a memory location. EQU for the counter constant in the immediate addressing mode: When executing the instructions "MOV CX,COUNT", the register CX will be loaded with the value 25. In contrast to using DB:

When executing the same instruction "MOV CX,COUNT" it will be in the direct addressing mode. EQU can also be used in the data segment: Assume a constant (a fixed value) used in many different places in the data and code segments. By use of EQU, one can change it once and the assembler will change all of them.

DD define doubleword The DD directive is used to allocate memory locations that are 4 bytes (two words) in size. Data is converted to hex & placed in memory locations Low byte to low address and high byte to high address. • List file for DD examples.

DQ define quadword DQ is used to allocate memory 8 bytes (four words) in size, to represent any variable up to 64 bits wide: • List file for DQ examples.

DT define ten bytes DT is used for memory allocation of packed BCD numbers. This directive allocates 10 bytes. A maximum of 18 digits can be entered. The "H" after the data is not needed. List file for DT examples.

DQ define ten bytes DT can also be used to allocate 10-byte integers by using the "D" option:

Directives Below shows the memory dump of the data section, including all the examples in this section. It is essential to understand the way operands are stored in memory.

All of the data directives use the little endian format. For ASCII data, only DB can define data of any length. Use of DD, DQ, or DT directives for ASCII strings of more than 2 bytes gives an assembly error.

Review "DATA20 DQ 4523C2", residing in memory starting at offset 00C0H. C2, the least significant byte, is in location 00C0, with 23 in 00C1, and 45, the most significant byte, in 00C2.

When DB is used for ASCII numbers, it places them backwards in memory. Review "DATA4 DB '2591'" at origin 10H:32, ASCII for 2, is in memory location 10H;35; for 5, in 11H; etc.

FULL SEGMENT DEFINITION
The SEGMENT and ENDS directives indicate the beginning & ending of a segment, in this format: The label, or name, must follow naming conventions and be unique. The [options] field gives important information to the assembler for organizing the segment, but is not required. The ENDS label must be the same label as in the SEGMENT directive. In full segment definition, the ".MODEL" directive is not used.

The directives ".STACK", ".DATA", and ".CODE" are replaced by SEGMENT and ENDS directives that surround each segment. Figure 2-8 shows the full segment definition and simplified format, side by side. • Followed by programs 2-2 and 2-3. Simple Segment Definition Full Segment Definition .MODEL .SATCK .DATA .CODE label SEGMENT [options] ;place the statements belonging to ;this segment here label ENDS ASSUME have to use in Code segment ASSUME CS: Name of Segment, DS: Name of Segment, SS: Name of Segment, ES: Name of Segment

Figure 2-8

Program 2-2 rewritten using full segment definition.

Program 2-3 rewritten using full segment definition.

Stack segment definition The stack segment shown contains the line "DB 64 DUP (?)" to reserve 64 bytes of memory for the stack. The following three lines in full segment definition are comparable to ".STACK 64" in simple definition:

Data segment definition In full segment definition, the SEGMENT directive names the data segment and must appear before the data. The ENDS segment marks the end of the data segment: The code segment also begins and ends with SEGMENT and ENDS directives:

Code segment definition Immediately after PROC, the ASSUME directive, associates segments with specific registers. By assuming the segment register is equal to the segment labels used in the program. If an extra segment had been used, ES would also be included in the ASSUME statement. ASSUME tells the assembler which of the segments, defined by SEGMENT, should be used. Also helps the assembler to calculate the offset addresses from the beginning of that segment. In "MOV AL, [BX] " the BX register is the offset of the data segment.

On transfer of control from OS to the program, of the three segment registers, only CS and SS have the proper values. The DS value (and ES) must be initialized by the program.

EXE vs. COM files The EXE file is used widely as it can be of any size. There are occasions when, due to a limited amount of memory, one needs to have very compact code. COM files must fit in a single segment. The x86 segment size is 64K bytes, thus the COM file cannot be larger than 64K. To limit the size to 64K requires defining the data inside the code segment and using the end area of the code segment for the stack. In contrast to the EXE file, the COM file has no separate data segment definition.

The header block, which occupies 512 bytes of memory, precedes every EXE file. It contains information such as size, address location in memory, and stack address of the EXE module. The COM file does not have a header block.

FLOWCHARTS AND PSEUDOCODE
Structured programming Structured programming uses three basic types of program control structures: Sequence. Control. Iteration.

Principles a structured program should follow: The program should be designed before it is coded. By using flowcharting or pseudocode, the design is clear those coding, as well as those maintaining the program later. Use comments within the program and documentation. This will help other figure out what the program does and how it does it. The main routine should consist primarily of calls to subroutines that perform the work of the program. Sometimes called top-down programming. Using subroutines to accomplish repetitive tasks saves time in coding, and makes the program easier to read.

Principles a structured program should follow: Data control is very important. The programmer should document the purpose of each variable, and which subroutines might alter its value. Each subroutine should document its input/output variables, and which input variables might be altered within it.

Flowcharts use graphic symbols to represent different types of program operations. The symbols are connected together to show the flow of execution of the program. • Flowcharting has been standard industry practice for decades. Flowchart templates help you draw the symbols quickly and neatly.

An alternative to flowcharts, pseudocode, involves writing brief descriptions of the flow of the code. SEQUENCE is executing instructions one after the other.

An alternative to flowcharts, pseudocode, involves writing brief descriptions of the flow of the code. IF-THEN-ELSE and IF-THEN are control programming structures, which can indicate one statement or a group of statements.

An alternative to flowcharts, pseudocode, involves writing brief descriptions of the flow of the code. REPEAT-UNTIL and WHILE-DO are iteration control structures, which execute a statement or group of statements repeatedly. Figure Shows REPEAT-UNTIL Pseudocode vs. Flowchart REPEAT-UNTIL structure always executes the statement(s) at least once, and checks the condition after each iteration.

An alternative to flowcharts, pseudocode, involves writing brief descriptions of the flow of the code. REPEAT-UNTIL and WHILE-DO are iteration control structures, which execute a statement or group of statements repeatedly. Figure 2-19 WHILE-DO Pseudocode vs. Flowchart WHILE-DO may not execute the statement(s) at all, as the condition is checked at the beginning of each iteration.

Control structures Flowchart vs. pseudocode for Program 2-1, showing steps for initializing/decrementing counters. Housekeeping, such as initializing the data segment register in the MAIN procedure are not included in the flowchart or pseudocode.

The purpose of flowcharts or pseudocode is to show the program flow, and what the program does. Pseudocode gives the same information as a flowchart, in a more compact form. Often written in layers, in a top-down manner. Code specific to a certain language or operating platform is not described in the pseudocode or flowchart. Ideally, one could take a flowchart or pseudocode and code the program in any language.

The x86 microprocessor Assembly language programming

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