1. EMT 251
SPICE NETLIST

2. Introduction SPICE (Simulation with Integrated Circuits Emphasis)
General purpose circuit simulator which widely used in microelectronics industry
Developed at University of California Berkeley
Many variants e.g. HSPICE, PSPICE etc.
Uses a simple netlist format for data input
Most manufacturers provide SPICE models as an essential for CAD tool
Knowledge of various device parameters are essential for performing detailed circuit simulations and for optimizing design

3. Cont… SPICE had three built-in MOSFET models:
Level 1 (MOS1) >> described by square-law current-voltage characteristics
Level 2 (MOS2) >> detailed analytical MOSFET model
Level 3 (MOS3) >> semi-empirical model
Recently, BSIM3 (Berkeley Short-Channel IGFET Model) ver. has been added to allow more accurate characterization of sub-micron MOSFET characteristics

4. SPICE Netlist Flow Chart

5. Advantages Improved memory utilisation
Improved convergence for numerical algorithms
Improved accuracy
Improved execution speed
Can be used for mixed mode simulation

6. Basic Concept Circuits for SPICE simulation are described: Example:
The elements of the circuit (voltage, current, resistors, capacitors, transistors etc.)
A list of the nets/nodes (can be assigned names or numbers depending on the specific software used)
Example:
circuit’s element
list of nodes

7. Element Line Descriptions
Voltage Source
Vxx +node -node DC value
Current Source
Resistor
Rxx node1 node2 value
Capacitor
Cxx node1 node2 value
Diode
Dxx +node -node model_name <area> plus other optional parameters
Bipolar Transistor
Qxx collector base emitter <bulk> model_name <area> plus other optional parameters
MOS Transistor
Mxx drain gate source bulk model_name <L=value> <W=value> <AD=value> <AS=value> plus other optional parameters
Note: parameters in <> are optional and not required for simulation.

8. R K

9. Mn nmos l=2 w=4

10. Vsupply
Isupply

11. Analysis Methods Transient DC AC
To observe the value of a variable as it changes with time, e.g. the voltage across a capacitor in an RC circuit. DC
To observe the value of one variable while another is changing or “sweeping” from one value to another, e.g. IV characteristics. AC
To sweep all AC sources across a range of frequencies, use the .AC command.

12. Analysis Descriptions
SPICE can perform a variety of types of analysis on a circuit:
Transient Analysis
.TRAN TSTEP TSTOP <TSTART> <TMAX>
TSTEP is the time step used between analysis points, and the smaller the value is, the more resolution you will get in your simulation. A typical value is 1nsec.
TSTOP is the time when you want your transient analysis to stop. This value will depend on the frequency of your input signal(s) and the time it takes for your circuit to produce its final output.
TSTART is used if you want the analysis to start at some time other than Time=0.
TMAX is used to set the largest step time that will be used. This parameter is typically not needed.

13. Cont..
DC Analysis
Use a DC analysis if you want to view the response of the circuit when a source (voltage or current) sweeps between two DC values. The command and parameters are:
.DC Source_name START STOP STEP
Source_name is the name of the source that will be swept.
START and STOP are the beginning and ending values of the sweep.
STEP is the increment value used during the sweep.

14. Cont..
AC Analysis
To sweep all AC sources across a range of frequencies, use the .AC command.
.AC Lin/Dec/Oct N FSTART FSTOP
FSTART and FSTOP are the beginning and ending frequencies of the AC analysis.
Select either Lin, Dec, or Oct for a linear, decade, or octave scaled sweep with N points analyzed.

15. Transient Analysis of an RC Circuit

16. Transient Analysis Syntax
.TRAN TSTART TSTOP <TSTEP> <TMAX>
TSTART is used if you want the analysis to start at some time other than Time=0.
TSTOP is the time when you want your transient analysis to stop. This value will depend on the frequency of your input signal(s) and the time it takes for your circuit to produce its final output.
TSTEP is the time step used between analysis points, and the smaller the value is, the more resolution you will get in your simulation. A typical value is 1nsec.
TMAX is used to set the largest step time that will be used. This parameter is typically not needed.

17. DC Analysis Example 1

18. DC Analysis Example 2

19. DC Analysis Syntax .DC Source_name START STOP STEP
Source_name is the name of the source that will be swept.
START and STOP are the beginning and ending values of the sweep.
STEP is the increment value used during the sweep.

20. AC Analysis Syntax .AC Lin/Dec/Oct N FSTART FSTOP
FSTART and FSTOP are the beginning and ending frequencies of the AC analysis.
Select either Lin, Dec, or Oct for a linear, decade, or octave scaled sweep with N points analyzed.

21. SPICE Units
The default units for SPICE are volts, amps, ohms, farads, henries,
watts etc. You can specify values in decimal form, , or
exponential form, 5.6e-3. SPICE also recognizes the following
abbreviations:
f E-15 femto
p E-12 pico
n E-9 nano
u E-6 micro
m E-3 milli   
k E+3 kilo
meg E+6 mega
g E+9 giga
t E+12 tera
For clarity you can add letters to the abbreviation as in 1U or
1UFARADS and both are read as the value 1e-6.. SPICE processes
the first letter after the number and ignores the rest.

22. INPUT STIMULUS SYNTAX
2 common techniques:
PULSE command
PWL command

23. Input Stimulus Desired

24. Using “PULSE” Vin 3 0 PULSE -1 1 2ns 4ns 3ns 20ns 50ns
This voltage source is connected between nodes 3 and 0, and switches between -1 and 1 V.
It begins to rise after a delay of 2ns, with a rise time of 4ns, a fall time of 3ns, a pulse width of 20ns and a period of 50ns.

25. Using “PWL” Vpulse 3 0 PWL 0 -1 2ns -1 6ns 1 + 26ns 1 29ns -1
For the same waveform:
Vpulse 3 0 PWL ns -1 6ns ns 1 29ns -1

26. SPICE Netlist for inverter
.global VDD GND
.connect GND 0
.lib /EDA/Mentor-training-ADK/technology/accusim/tsmc035.mod NOM
.probe tran V
.TRAN 0 400ns 1ns
.subckt circuit portin portout
MN1 DRAIN GET SOURCE BULK p L=0.4u W=1u
MN2 DRAIN GET SOURCE BULK n L=0.4u W=1u
.ends circuit
.subckt inv in out
MN1 out in VDD VDD p L=0.4u W=1u
MN2 out in GND GND n L=0.4u W=1u
.ends inv
X13 portin portout circuit
VOL1 VDD GND DC 5V
VOL2 in GND PWL (0ns 0 100ns 0 101ns 5V 200ns 5V 201ns 0 300ns 0)
X13 in out inv
.end
Format
Format

27. Exercise (Write Netlist)1. 2.

28. Solution Answer 1: .global VDD GND .connect GND 0
.lib /EDA/Mentor-training-ADK/technology/accusim/tsmc035.mod NOM
.probe tran V
.TRAN ns 1ns
.subckt exercise1 A B OUT
MP1 node1 A VDD VDD pmos L=0.4u W=1u
MP2 OUT B node1 VDD pmos L=0.4u W=1u
MN1 OUT A GND GND nmos L=0.4u W=1u
MN2 OUT B GND GND nmos L=0.4u W=1u
.ends inv
X1 A B OUT exercise1
VOL1 VDD GND DC 5V
VOL2 A GND PWL (0ns 0 100ns 0 101ns 5V 200ns 5V 201ns 0 300ns 0)
VOL3 B GND PWL (0ns 0 100ns 0 101ns 5V 200ns 5V 201ns 0 300ns 0)
.end

29. Solution
Question 2:

30. Solution Answer 2: .global GND .connect GND 0
.lib /EDA/Mentor-training-ADK/technology/accusim/tsmc035.mod NOM
.probe tran V
.TRAN ns 1ns
V GND  DC 5
R1 1   2     1k
R2 2  3     100
R GND 100meg
C GND 100p
V1 VDD GND DC 5V
.plot DC v(2,3)
.end

31. POP QUIZ