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Fault Discrimination and Coordination in a DC Community Microgrid

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Presentation on theme: "Fault Discrimination and Coordination in a DC Community Microgrid"— Presentation transcript:

1 Fault Discrimination and Coordination in a DC Community Microgrid
KARTHIK PALANIAPPAN MeNgYUAN Qi Advisor: DR. ROBERT M. CUZNER

2 LVDC Microgrid Value Proposition
DC Microgrids will accelerate the adoption and insertion of power electronics into the electric grid by enabling effective utilization of energy saving loads and integration between renewable energy resources and storage More efficient power delivery and more effective energy dispatch DC systems will be less complex and less expensive to deploy, operate and maintain. Growing “DC Backbone” of building and home loads (lighting, motors, electronics) No need for phase synchronization Plug and play power electronics enabled systems can be achieved DC systems can be safer than AC Control of ARC flash exposure can be realized Faster Protection is a key element Circuit protection can be faster and more reliableNew ideas for protective devices and distribution are needed!

3 Milwaukee Community DC Microgrid Project
Low income households expend >16% on utilities compared to middle class households, which expend 3% of their income Utility costs are a major impediment to economic mobility—this fact is recently becoming recognized Adoption of cost saving/environmentally friendly technologies such as Solar PV plus batteries is out of reach of low income households—creates an ever widening disparity gap Proposed Solution: Interconnected smart homes with cooperative energy using a DC Microgrid Journal Sentinel, April 16, 2016 “Historic Garden Homes District Struggles to Find its Future”

4 Normal “On” SiC JFET Based Approach
Unidirectional Switch

5 Normal “On” SiC JFET Based Approach

6 Simulation Layouts for Two Cascaded SSCBs
Test set-up for coordination between cascaded SSCBs Simulation Layouts for Two Cascaded SSCBs

7 Simulation of JFET currents and gate voltages for two cascaded devices

8 The hardware experimental set-up
Photograph of a cascaded SSCB

9 Normal “On” SiC JFET Based Approach
R1>R2>R3 would mean that the time taken to turn off the JFET would be in the same order.


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