1. VIA Course Schedule Finish Final Project report by 1/25/2003
CORDIC and RNS (11/30)
Multirate SP (I) (12/7)
Multirate SP (II) (12/14)
Final project proposal deadline (12/14)
Low-power CMOS Design (12/21)
Mid-term exam (12/28)
Final project presentation (1/4~1/18)
Finish Final Project report by 1/25/2003
台灣大學 吳安宇 教授

2. Final Project Schedule:
Proposal written report (2~3 pages): Dec. 14, 2001.
Your chosen Topic (better based on recent research results within year 2000~2002) that is related to VLSI Signal Processing.
Name and on cover page
Research motivation and goal
Problem statement
Summary of your approach
Expected results (itemized)
(Optional) Impact to your ongoing/future working items and/or research works.
Reference list
Final written report due: Jan. 25, 2003 (Saturday noon)
台灣大學 吳安宇 教授