1. FPGA IMPLEMENTATION OF TCAM Under the guidance of Dr. Hraziia Presented By Malvika (2016341022) Department of Electronics and Communication Engineering National Institute of Technology Nagaland 7-Sep-171Project I | Assessment I

2. Outline Objective Introduction Motivation Block diagram Literature review Future work References 7-Sep-172Project I | Assessment I

3. Objective Designing and implementation of TCAM using both Distributed RAM and Block RAM Analysis of which one (Dist. RAM/ BRAM) will be more efficient. Implementation of variable length word TCAM. 7-Sep-173Project I | Assessment I

4. Motivation We are already having several search algorithms to search data but if there are so many bits to search then the whole system goes slow and also with binary cam we can search only two bits so ternary cam will overcome this problem. Variable length word can be implemented using TCAM. 7-Sep-174Project I | Assessment I

5. CAM: Introduction Binary CAM vs. RAM 001101115 100011014 101111013 110010112 000011011 010101010 10001101 Data Out 4 Address In 110001115 000111014 100011013 110010112 000011011 010101010 10001101 Data In 3 Address Out 1000110110001101 7-Sep-175Project I | Assessment I

6. CAM: Introduction Ternary CAM (TCAM) 00X001115 010011014 000111013 110010X12 101011011 010X01010 XXX01101 Input Keyword XXXXX1115 XXXX11014 XXX111013 XX0010112 X00011011 010101010011010110111010001101 1 4 Match 1 4 10001101 Input Keyword 7-Sep-176Project I | Assessment I

7. Block Diagram 7-Sep-177Project I | Assessment I

8. Literature Review(1/2) 7-Sep-178Project I | Assessment I Reference [1] Source: Weirong Jiang, 2013

9. Literature Review (2/2) Reference [2] 7-Sep-179 Source: Z. Ullah et al., 2012 Project I | Assessment I

10. Future Work Present the design and implementation of TCAM using both Distributed RAM and BRAM. Present the implementation of variable length word TCAM. 7-Sep-1710Project I | Assessment I

11. References [ 1] Weirong Jiang, Xilinx Research Labs San Jose, CA, USA. Scalable Ternary Content Addressable Memory Implementation Using FPGAs. Proceedings of the ninth ACM/IEEE, Press Piscataway, NJ, USA, 2013 symposium on Architectures for networking and communications [2] Z. Ullah, M. K. Jaiswal, Y. C. Chan and R. C. C. Cheung. FPGA Implementation of SRAM-based Ternary Content Addressable Memory. In IPDPSW '12: Proceedings of the IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012. 7-Sep-1711Project I | Assessment I

12. 7-Sep-1712Project I | Assessment I

13. 7-Sep-1713Project I | Assessment I