1. © Synopsys 20131 ISCUG: Virtual Prototyping From evolution to revolution Kevin Smart 15-Apr-2013

2. © Synopsys 20132 A proud Scotsman Kevin Smart Director, R&D. System-Level Solutions at Synopsys Responsible for Virtual Prototyping delivery Joined Virtio in 2001, acquired by Synopsys in 2006 Delivered >80 virtual platforms, >3000 TLMs Introduced first commercial SystemC TLM-2.0 model library in 2008 Accelerating development of ARM and automotive SystemC virtual platforms, with Virtualizer Development Kits (VDKs)

3. © Synopsys 20133 The last 10 years has seen virtual prototyping evolve from early adoption to mainstream, from proprietary technologies to standardizing on SystemC Outline As embedded system complexity grows, with software playing a bigger role, virtual prototyping will face fresh challenges, including model availability and performance We will discuss real world examples of how companies are using SystemC based virtual platforms for early software development Learn about reducing modeling time, creating efficient virtual prototypes, and the paradigm shift required to enable a modeling ecosystem

4. © Synopsys 20134 Fully functional software model of complete systems SoC, board, I/O, user interface Executes unmodified production code Drivers, OS, and applications Runs fast Boots OS in seconds Highest debugging efficiency through full system visibility and control Supports multi-core SoCs debug Easy deployment What is a Virtual Prototype? Software Stack Virtual Prototype

5. © Synopsys 20135 Manufac- turing Manufac- turing Standard Project Flow Without Prototyping SoC Hardware Development Spec FreezeTape OutProject FinishedSilicon Software Development, HW/SW Integration & System Validation Software Development, HW/SW Integration & System Validation Why Prototype? Right Architecture, Earlier SW Development, HW/SW Integration & System Validation Gained TTM Software Development, Integration & System Validation Software Development, Integration & System Validation Early Time-to-Market with Prototyping Manufac- turing Manufac- turing Spec FreezeTape OutProject FinishedSilicon SoC Hardware Development Arch Design Arch Design Arch Design Arch Design

6. © Synopsys 20136 Virtual Prototyping Evolution How we got where we are today

7. © Synopsys 20137 The Innovators, the Turnkey era 2002- Post-silicon use cases emerged first Compared to today it was easier to model an entire design e.g. Intel Lubbock, TI OMAP1510 –SoCs: 1-2 processor cores –Fewer discrete components Could run production software images in automated regressions –Avoid waiting 15-mins to reprogram the Flash Large disparity in performance, host PC vs. virtual target –Interpreted ISSs were fine

8. © Synopsys 20138 Early adoptors 2004- It’s all about Early –With post-Si value established it was realized there could be huge schedule benefits from early software development –Especially for ROM code, secure software that resides on-chip –Needs to be correct first-time, avoid expensive respin And even Earlier –Incremental development aligned with software schedules

9. © Synopsys 20139 IO Memory Controller ARM Cortex MPCore L2 ICT Display Graphics Video Imaging Power & Clocks Peripheral -als Security Flash Audio Sensors Sensors softwareMultimedia softwareGraphics softwareDriver developmentOS base portSecurity softwareBoot code Security software OS base port Driver development Graphics software Multimedia software Sensor software ARM Cortex MPCore IO Memory Controller ARM Cortex MPCore L2 ICT Display Graphics Video Imaging Power & Clocks Peripheral -als Peripheral -als Security Flash Audio Sensors ARM Cortex MPCore Peripheral -als Peripheral -als Best Practices - Incremental Development Enabling Software Bringup In Lock Step with SoC Design Modeling Team Software Development TeamSoftware ready before silicon availability Requires tight planning alignment between modeling and software teams

10. © Synopsys 201310 Hardware Availability Early (Pre-Si) Software Development Deliver to OEM # of users Virtual Platform Usage A Case Study

11. © Synopsys 201311 From Turnkey to Collaborative 2005 As Complexity grew, modeling effort increased –Collaborative development started to make more sense Customer modeling teams were established and trained Increased complexity, multi-core, required greater performance –JIT ISS technology Other use cases explored –Optimizing software for power –Trend-based performance analysis

12. © Synopsys 201312 Move to open standards 2006-2007 Acquisition by Synopsys Standardization- tools updated to support SystemC Key contributor to TLM-2.0 (focus on performance: DMI, temporal decoupling) 2008 Ratification of TLM-2.0 Release of DesignWare System-Level Library, first commercial TLM-2.0 compliant model library

13. © Synopsys 201313 Acquisitions 2010 VaST –Acquired fast timing-approximate technology –Automotive vertical CoWare –SystemC based Architecture Performance Analysis/Optimization –Hardware/software combined analysis –SystemC Modeling Library (SCML2), to simplify creation of TLMs

14. © Synopsys 201314 Consolidation 2011-2012 Virtualizer –New tool with enhanced SystemC kernel designed to support existing portfolio of models, strengthening debug and analysis Fast-Timed Models –VaST technology brought into SystemC 2012-2013 Virtualizer Development Kits(VDKs) –Extensible VPs + Debug/Analysis + Sample Software –ARM big.LITTLE, using ARM Fast Models –ARMv8, agreement with ARM –Automotive MCUs- Freescale, Renesas

15. © Synopsys 201315 Simplified Model Creation Flow IDE/Assembly Tools Code Generator Data Model TLM-2.0 Model (+ docs and tests) TLM-2.0 Model (+ docs and tests) GUI Import Tcl API Tcl Script Excel Proprietary Format IP-XACT Proprietary Format Round tripping Page  15 TLMCreator

16. © Synopsys 201316 VP/VDK Development Flow Platform Creator Start ‘New Platform’ Plug Tests into Test Framework Develop System Tests Perform Integration & System Testing System Specification Platform Assembly System & Integration Testing Release Drop Component Libraries Component Tests Licensing & Packaging Final Release Testing Releasing Automatic Test Report Auto-building Virtual Platform

17. © Synopsys 201317 VDK Use VDKs Virtualizer: VP Creation Model Libraries Block Creation Flows Component Modeling Assembly Debugging Virtual Prototype HW/SW Debug & Analysis Tools Software Tool Interfaces Co-Simulation & External Connectivity Design Tasks: SW-driven verification SoC HW/SW integration SW development System validation & test Supply chain enablement VDK Creation Flow VDK Creation and Use Flow

18. © Synopsys 201318 Simulation Speed Many factors influence performance abstraction modeling coding style i/o (tracing, logging, semi-hosting, …) host machine and cache compiler (and flags) host OS design complexity temporal accuracy watchpoints target cache on/off cache/MMU models PEQ clocks eSW image (spatial/temporal locality, peripheral accesses, …) eSW breakpoints simulation breakpoints temporal decoupling DMI vs front door access interconnect modeling clock modeling DMI handling memory configuration # of synchronization points ISS speed JIT cache beat / burst timing JIT engine quantum dynamic static effective alignment rounding scaling ability to profile and interpret results Page  18

19. © Synopsys 201319 Which model is slowing down the simulation? Hot Spot View: Where are the slow areas? Process Trace: Which SystemC threads eating most time? When is a Quantum Broken? Page  19 VPExplorer

20. © Synopsys 201320 Achieving Prototyping Productivity Specifications Inventory of Models Needed Create Needed Models Create & Optimize Prototype Provide Prototype to SW Teams, Ecosystem Prototype Updated TLMCentral Model Libraries TLM Creator/VPExplorerVPExplorer Page  20

21. © Synopsys 201321 Virtual Prototyping Revolution The way forward

22. © Synopsys 201322 The Virtual Prototyping Urgency Page  22

23. © Synopsys 201323 The Virtual Prototyping Challenges Model availability –SoCs are increasing in complexity, raising the modeling barrier –Need to lower the barrier through model reuse –IP vendors should provide quality TLMs –TLMs should be a by-product of the hardware flow –Further interfaces should be standardized –Need models for different use cases e.g. Accelerometer: file-input for driver developer vs. interactive for end-user –Licensing requires simplified Please add your models to tlmcentral.com TLM2 SPI TLM-2 SERIAL TX/RX TLM-2 AHB Socket IRQ RST CLK

24. © Synopsys 201324 Model Yellow Pages First industry-wide portal to aggregate available transaction-level models Open & Free Models of most common IP blocks and interfaces for wireless, consumer and automotive apps >1000 models Supported by leading IP vendors, tool providers, service companies and universities Community Supported Offers model developers, architects and SW engineers an infrastructure for news, forums and blogs Methodology Information

25. © Synopsys 201325 The Virtual Prototyping Challenges Performance –Single-thread performance is tailing off –Need to exploit multi-core better –GPU will be a challenge (OpenGL, OpenCL, Renderscript) Hybrid Approach

26. © Synopsys 201326 Modem Chip Bluetooth, GPS WiFi Audio Camera Touchscreen RAMBattery SIM card Controller Memory Controller Dual Core ARM Cortex L1 L2 ICT Display Graphics Video Imaging Power & Clocks Peripher -als SD controller IO processor Audio processor Sensor processor Natural Partition with Hybrid Approach Customer Example: Mobile Applications Processor Virtual PrototypeFPGA-Based Prototype + Rapid creation of models + High execution speed + Excellent debug access + 'Unlimited' capacity + Rapid creation of models + High execution speed + Excellent debug access + 'Unlimited' capacity + Validation of SoC RTL + Real world I/O access + Cycle accurate + Validation of SoC RTL + Real world I/O access + Cycle accurate

27. © Synopsys 201327 The Virtual Prototyping Challenges Increasing value –Models should be “chatty” providing feedback to users on programming violations –Be Earlier, increase modeling productivity through tool improvements, reusable libraries –We need to provide more root cause analysis, solving embedded software challenges

28. © Synopsys 201328 The last 10 years has seen virtual prototyping evolve from early adoption to mainstream, from proprietary technologies to standardizing on SystemC Summary As embedded system complexity grows, with software playing a bigger role, virtual prototyping will face fresh challenges, including model availability and performance A paradigm shift is required to enable a modeling ecosystem: IP vendor models, interface standardization, simplified licensing Further tool improvements are required to reduce modeling effort, solve embedded software challenges

29. © Synopsys 201329 Thank You