1. What does this code do? label: sub $a0, $a0, 1 bne $a0, $zero, label
We’ll finish up talking about memory
We’ll go into more detail about the ISA.
Pseudo-instructions
Using branches for conditionals
Arf
September 10, 2017

2. Pseudo-instructions
MIPS assemblers support pseudo-instructions that give the illusion of a more expressive instruction set, but are actually translated into one or more simpler, “real” instructions.
In addition to the la (load address) we saw on last lecture, you can use the li and move pseudo-instructions:
li $a0, 2000 # Load immediate 2000 into $a0
move $a1, $t0 # Copy $t0 into $a1
They are probably clearer than their corresponding MIPS instructions:
addi $a0, $0, 2000 # Initialize $a0 to 2000
add $a1, $t0, $0 # Copy $t0 into $a1
We’ll see lots more pseudo-instructions this semester.
A complete list of instructions is given in Appendix A of the text.
Unless otherwise stated, you can always use pseudo-instructions in your assignments and on exams.
Pseudo-instructions like add, sub, div, etc. “overload” the standard built-in instructions.
September 10, 2017

3. Control flow in high-level languages
The instructions in a program usually execute one after another, but it’s often necessary to alter the normal control flow.
Conditional statements execute only if some test expression is true.
// Find the absolute value of *a0
v0 = *a0;
if (v0 < 0)
v0 = -v0; // This might not be executed
v1 = v0 + v0;
Loops cause some statements to be executed many times.
// Sum the elements of a five-element array a0
v0 = 0;
t0 = 0;
while (t0 < 5) {
v0 = v0 + a0[t0]; // These statements will
t0++; // be executed five times }
September 10, 2017

4. Control-flow graphs
It can be useful to draw control-flow graphs when writing loops and conditionals in assembly:
// Find the absolute value of *a0
v0 = *a0;
if (v0 < 0)
v0 = -v0;
v1 = v0 + v0;
// Sum the elements of a0
v0 = 0;
t0 = 0;
while (t0 < 5) {
v0 = v0 + a0[t0];
t0++; }
September 10, 2017

5. MIPS control instructions
In section, we introduced some of MIPS’s control-flow instructions
j // for unconditional jumps
bne and beq // for conditional branches
slt and slti // set if less than (w/ and w/o an immediate)
And how to implement loops
You went to section, right?
Today, we’ll talk about
MIPS’s pseudo branches
if/else
case/switch (bonus material)
September 10, 2017

6. Pseudo-branches
The MIPS processor only supports two branch instructions, beq and bne, but to simplify your life the assembler provides the following other branches:
blt $t0, $t1, L1 // Branch if $t0 < $t1
ble $t0, $t1, L2 // Branch if $t0 <= $t1
bgt $t0, $t1, L3 // Branch if $t0 > $t1
bge $t0, $t1, L4 // Branch if $t0 >= $t1
There are also immediate versions of these branches, where the second source is a constant instead of a register.
Later this semester we’ll see how supporting just beq and bne simplifies the processor design.
September 10, 2017

7. Implementing pseudo-branches
Most pseudo-branches are implemented using slt. For example, a branch-if-less-than instruction blt $a0, $a1, Label is translated into the following.
slt $at, $a0, $a1 // $at = 1 if $a0 < $a1
bne $at, $0, Label // Branch if $at != 0
This supports immediate branches, which are also pseudo-instructions. For example, blti $a0, 5, Label is translated into two instructions.
slti $at, $a0, 5 // $at = 1if $a0 < 5
bne $at, $0, Label // Branch if $a0 < 5
All of the pseudo-branches need a register to save the result of slt, even though it’s not needed afterwards.
MIPS assemblers use register $1, or $at, for temporary storage.
You should be careful in using $at in your own programs, as it may be overwritten by assembler-generated code.
September 10, 2017

8. Translating an if-then statement
We can use branch instructions to translate if-then statements into MIPS assembly code.
v0 = *a0; lu $v0, 0($a0)
if (v0 < 0) bgei $v0, 0, skip
v0 = -v0; sub $v0, $0, $v0
v1 = v0 + v0; skip: add $v1, $v0, $v0
Sometimes it’s easier to invert the original condition.
In this case, we changed “continue if v0 < 0” to “skip if v0 >= 0”.
This saves a few instructions in the resulting assembly code.
September 10, 2017

9. Control-flow Example
Let’s write a program to count how many bits are set in a 32-bit word.
int in = 0xabcdabcd;
int count=0;
for ( int i=0; i<32; i++ ) {
if ( in & 1 )
count++;
in = in >> 1; }
September 10, 2017

10. Translating an if-then-else statements
If there is an else clause, it is the target of the conditional branch
And the then clause needs a jump over the else clause
// increase the magnitude of v0 by one
if (v0 < 0) bge $v0, $0, E
v0 --; sub $v0, $v0, 1
j L
else
v0 ++; E: add $v0, $v0, 1
v1 = v0; L: move $v1, $v0
Dealing with else-if code is similar, but the target of the first branch will be another if statement.
Drawing the control-flow graph can help you out.
September 10, 2017

11. Case/Switch Statement
Many high-level languages support multi-way branches, e.g.
switch (two_bits) {
case 0: break;
case 1: /* fall through */
case 2: count ++; break;
case 3: count += 2; break; }
We could just translate the code to if, thens, and elses:
if ((two_bits == 1) || (two_bits == 2)) {
count ++;
} else if (two_bits == 3) {
count += 2;
This isn’t very efficient if there are many, many cases.
September 10, 2017

12. Case/Switch Statement
switch (two_bits) {
case 0: break;
case 1: /* fall through */
case 2: count ++; break;
case 3: count += 2; break; }
Alternatively, we can:
Create an array of jump targets
Load the entry indexed by the variable two_bits
Jump to that address using the jump register, or jr, instruction
This is much easier to show than to tell.
(see the example with the lecture notes online)
September 10, 2017

13. int foo(char *s) { int L = 0; while (*s++) { ++L; } return L;
What does this C code do?
int foo(char *s) {
int L = 0;
while (*s++) {
++L; }
return L;
September 10, 2017

14. Machine Language and Pointers
Today we’ll discuss machine language, the binary representation for instructions.
We’ll see how it is designed for the common case
Fixed-sized (32-bit) instructions
Only 3 instruction formats
Limited-sized immediate fields
Array Indexing vs. Pointers
Pointer arithmetic, in particular
September 10, 2017

15. Assembly vs. machine language
So far we’ve been using assembly language.
We assign names to operations (e.g., add) and operands (e.g., $t0).
Branches and jumps use labels instead of actual addresses.
Assemblers support many pseudo-instructions.
Programs must eventually be translated into machine language, a binary format that can be stored in memory and decoded by the CPU.
MIPS machine language is designed to be easy to decode.
Each MIPS instruction is the same length, 32 bits.
There are only three different instruction formats, which are very similar to each other.
Eg. Machine Language code of following instruction is 10AC0003hex
Studying MIPS machine language will also reveal some restrictions in the instruction set architecture, and how they can be overcome.
000100
00101
01100 op rs rt
address
September 10, 2017

16. R-type format
Register-to-register arithmetic instructions use the R-type format.
This format includes six different fields.
op is an operation code or opcode that selects a specific operation.
rs and rt are the first and second source registers.
rd is the destination register.
shamt is only used for shift instructions.
func is used together with op to select an arithmetic instruction.
The inside back cover of the textbook lists opcodes and function codes for all of the MIPS instructions. op rs rt rd
shamt
func
6 bits
5 bits
September 10, 2017

17. About the registers
We have to encode register names as 5-bit numbers from to
For example, $t8 is register $24, which is represented as
The complete mapping is given on page A-23 in the book.
The number of registers available affects the instruction length.
Each R-type instruction references 3 registers, which requires a total of 15 bits in the instruction word.
We can’t add more registers without either making instructions longer than 32 bits, or shortening other fields like op and possibly reducing the number of available operations.
September 10, 2017

18. I-type format
Load, store, branch and immediate instructions all use the I-type format.
For uniformity, op, rs and rt are in the same positions as in the R-format.
The meaning of the register fields depends on the exact instruction.
rs is a source register—an address for loads and stores, or an operand for branch and immediate arithmetic instructions.
rt is a source register for branches and stores, but a destination register for the other I-type instructions.
The address is a 16-bit signed two’s-complement value.
It can range from -32,768 to +32,767.
But that’s not always enough! op rs rt
address
6 bits
5 bits
16 bits
September 10, 2017

19. Larger constants
Larger constants can be loaded into a register 16 bits at a time.
The load upper immediate instruction lui loads the highest 16 bits of a register with a constant, and clears the lowest 16 bits to 0s.
An immediate logical OR, ori, then sets the lower 16 bits.
To load the 32-bit value :
lui $s0, 0x003D # $s0 = 003D 0000 (in hex)
ori $s0, $s0, 0x0900 # $s0 = 003D 0900
This illustrates the principle of making the common case fast.
Most of the time, 16-bit constants are enough.
It’s still possible to load 32-bit constants, but at the cost of two instructions and one temporary register.
Pseudo-instructions may contain large constants. Assemblers including SPIM will translate such instructions correctly.
Yay, SPIM!!
September 10, 2017

20. Loads and stores
The limited 16-bit constant can present problems for accesses to global data.
As we saw in our memory example, the assembler put our result variable at address 0x
0x is bigger than 32,767
In these situations, the assembler breaks the immediate into two pieces.
lui $at, 0x1001 # 0x
lw $t1, 0x0004($at) # Read from Mem[0x ]
September 10, 2017

21. Branches
For branch instructions, the constant field is not an address, but an offset from the current program counter (PC) to the target address.
beq $at, $0, L
add $v1, $v0, $0
add $v1, $v1, $v1
j Somewhere
L: add $v1, $v0, $v0
Since the branch target L is three instructions past the beq, the address field would contain 3. The whole beq instruction would be stored as:
SPIM’s encoding of branches offsets is off by one, so the code it produces would contain an address of 4. (But it has a compensating error when it executes branches.)
000100
00001
00000 op rs rt
address
September 10, 2017

22. Larger branch constants
Empirical studies of real programs show that most branches go to targets less than 32,767 instructions away—branches are mostly used in loops and conditionals, and programmers are taught to make code bodies short.
If you do need to branch further, you can use a jump with a branch. For example, if “Far” is very far away, then the effect of:
beq $s0, $s1, Far
...
can be simulated with the following actual code.
bne $s0, $s1, Next
j Far
Next: ...
Again, the MIPS designers have taken care of the common case first.
September 10, 2017

23. J-type format
Finally, the jump instruction uses the J-type instruction format.
The jump instruction contains a word address, not an offset
Remember that each MIPS instruction is one word long, and word addresses must be divisible by four.
So instead of saying “jump to address 4000,” it’s enough to just say “jump to instruction 1000.”
A 26-bit address field lets you jump to any address from 0 to 228.
your MP solutions had better be smaller than 256MB
For even longer jumps, the jump register, or jr, instruction can be used.
jr $ra # Jump to 32-bit address in register $ra op
address
6 bits
26 bits
September 10, 2017

24. Representing strings
A C-style string is represented by an array of bytes.
Elements are one-byte ASCII codes for each character.
A 0 value marks the end of the array. 32
space 48 64 @ 80 P 96 `
112 p 33 ! 49 1 65 A 81 Q 97 a
113 q 34 ” 50 2 66 B 82 R 98 b
114 r 35 # 51 3 67 C 83 S 99 c
115 s 36 $ 52 4 68 D 84 T
100 d
116 t 37 % 53 5 69 E 85 U
101 e
117 u 38
& 54 6 70 F 86 V
102 f
118 v 39 ’ 55 7 71 G 87 W
103 g
119 w 40 ( 56 8 72 H 88 X
104 h
120 x 41 ) 57 9 73 I 89 Y
105
121 y 42 * 58 : 74 J 90 Z
106 j
122 z 43 + 59 ; 75 K 91 [
107 k
123 { 44 , 60
< 76 L 92 \
108 l
124 | 45 - 61 = 77 M 93 ]
109 m
125 } 46 . 62
> 78 N 94 ^
110 n
126 ~ 47 / 63 ? 79 O 95 _
111 o
127
del
September 10, 2017

25. Null-terminated Strings
For example, “Harry Potter” can be stored as a 13-byte array. +1
Since strings can vary in length, we put a 0, or null, at the end of the string.
This is called a null-terminated string
Computing string length
We’ll look at two ways. 72 97
114
121 32 80
111
116
101 H a r y P o t e \0
September 10, 2017

26. Array Indexing Implementation of strlen
int strlen(char *string) {
int len = 0;
while (string[len] != 0) {
len ++; }
return len;
strlen:
li $v0, 0
L: add $t0, $a0, $v0
lb $t0, 0($t0)
beq $t0, $0, E
addi $v0, $v0, 1
j L
E: jr $ra
September 10, 2017

27. Pointers & Pointer Arithmetic
Many programmers have a vague understanding of pointers
Looking at assembly code is useful for their comprehension.
strlen:
li $v0, 0
L: lb $t0, 0($a0)
beq $t0, $0, E
addi $a0, $a0, 1
addi $v0, $v0, 1
j L
E: jr $ra
int strlen(char *string) {
int len = 0;
while (*string != 0) {
string ++;
len ++; }
return len;
int strlen(char *string) {
int len = 0;
while (string[len] != 0) {
len ++; }
return len;
September 10, 2017 27

28. What is a Pointer? A pointer is an address.
Two pointers that point to the same thing hold the same address
Dereferencing a pointer means loading from the pointer’s address
A pointer has a type; the type tells us what kind of load to do
Use load byte (lb) for char *
Use load half (lh) for short *
Use load word (lw) for int *
Use load single precision floating point (l.s) for float *
Pointer arithmetic is often used with pointers to arrays
Incrementing a pointer (i.e., ++) makes it point to the next element
The amount added to the point depends on the type of pointer
pointer = pointer + sizeof(pointer’s type)
1 for char *, 4 for int *, 4 for float *, 8 for double *
September 10, 2017

29. What is really going on here…
int strlen(char *string) {
int len = 0;
while (*string != 0) {
string ++;
len ++; }
return len;
September 10, 2017

30. Summary Machine language is the binary representation of instructions:
The format in which the machine actually executes them
MIPS machine language is designed to simplify processor implementation
Fixed length instructions
3 instruction encodings: R-type, I-type, and J-type
Common operations fit in 1 instruction
Uncommon (e.g., long immediates) require more than one
Pointers are just addresses!!
“Pointees” are locations in memory
Pointer arithmetic updates the address held by the pointer
“string ++” points to the next element in an array
Pointers are typed so address is incremented by sizeof(pointee)
September 10, 2017