1. Chapter 7 - Input/Output 7.1 External Devices 7.2 I/O Modules 7.3 Programmed I/O 7.4 Interrupt-Driven I/O 7.5 Direct Memory Access 7.6 I/O Channels and Processors 7.7 The External Interface: Thunderbolt and Infiniband 7.8 IBM zEnterprise 196 I/O Structure

2. Key Terms cycle stealing direct memory access (DMA) interrupt interrupt-driven I/O I/O channel I/O command I/O module I/O processor isolated I/O memory-mapped I/O multiplexor channel parallel I/O peripheral device programmed I/O selector channel serial I/O

3. 7.1 List three broad classifications of external, or peripheral, devices. Human readable: Suitable for communicating with the computer user. Machine readable: Suitable for communicating with equipment. Communication: Suitable for communicating with remote devices REVIEW QUESTIONS

4. 7.2 Describe the processes that take place during a programmable I/O read and write operation. Read Input in Programmed IO mode Each input is read after first testing whether the device is ready with the input (a state reflected by a bit in a status register) or whether the device input buffer is not empty The program waits for the ready status by repeatedly testing the status bit(s) and till all targeted bytes is read from the input device The program is in busy (non-waiting) state only after the device gets ready else in wait state Output writes in Programmed IO mode Each output written after first testing whether the device is ready to accept the byte(s) at its output register or output buffer is empty The program waits for the ready status by repeatedly testing the status bit(s) and till all the targeted bytes are written to the device The program in busy (non-waiting) state only after the device gets ready else wait state.

5. 7.3 Give the advantages and disadvantages of programmable I/O and interrupt driven I/O. Advantage of programmable I/O: A program and processor dedicated to wait and repeatedly tests the status and for IO data transfer still the IO operation completes. Disadvantages of programmable I/O: A program has to wait and repeatedly tests the status; waiting period for an asynchronous event can be too large.Many I/O devices generate asynchronous events— events that occur at times that the processor cannot predict or control, but which the processor must respond reasonably to provide acceptable performance. Advantages of Interrupt driven I/O: The system can do useful work while the device is not ready Disadvantages of Interrupt driven I/O: Interrupts are expensive. Because the occurrence of an interrupt is unpredictable, all state information about the interrupted program must be saved.

6. 7.4 Describe the modes of operation of the DMA. Burst Mode An entire block of data is transferred in one contiguous sequence. Once the DMA controller is granted access to the system bus by the CPU, it transfers all bytes of data in the data block before releasing control of the system buses back to the CPU. This mode is useful for loading program or data files into memory, but renders the CPU inactive for relatively long periods of time. The mode is also called Block Transfer Mode. Next

7. Cycle Stealing Mode The Cycle Stealing Mode is a viable alternative for systems, in which the CPU should not be disabled for the length of time needed for burst transfer modes. In the cycle stealing mode, the DMA controller obtains access to the system bus the same way as in burst mode, using BR (Bus Request) and BG (Bus Grant) signals, which are the two signals controlling the interface between the CPU and the DMA controller. However, in cycle stealing mode, after one byte of data transfer the control of the system bus is deasserted to the CPU via BG. It is then continually requested again via BR, transferring one byte of data per request, until the entire block of data has been transferred. By continually obtaining and releasing the control of the system bus, the DMA controller essentially interleaves instruction and data transfers. The CPU processes an instruction, then the DMA controller transfers one data value, and so on. On the one hand, the data block is not transferred as quickly in cycle stealing mode as in burst mode, but on the other hand the CPU is not idled for as long as in burst mode. Cycle stealing mode is useful for controllers that monitor data in real time. Transparent Mode The Transparent Mode takes the most time to transfer a block of data, yet it is also the most efficient mode in terms of overall system performance. The DMA controller only transfers data when the CPU is performing operations that do not use the system buses. It is the primary advantage of the transparent mode that the CPU never stops executing its programs and the DMA transfer is free in terms of time. The disadvantage of the transparent mode that the hardware needs to determine, when the CPU is not using the system buses, which can be complex and relatively expensive.

8. 7.6 When a device interrupt occurs, how does the processor determine which device issued the interrupt? Four general categories of techniques are in common use: multiple interrupt lines; software poll; daisy chain (hardware poll, vectored); bus arbitration (vectored).

9. 7.7 When a DMA module takes control of a bus, and while it retains control of the bus, what does the processor do? The processor pauses for each bus cycle stolen by the DMA module.

10. SHORT ANSWER 1. Interface to the processor and memory via the system bus or central switch and interface to one or more peripheral devices by tailored data links are two major functions of an _____________. I/O module 2. An external device connected to an I/O module is often referred to as a __________ device. peripheral 3. We can broadly classify external devices into three categories: human readable, communication, and __________. machine readable 4. The U.S. national version of the International Reference Alphabet is referred to as __________. ASCII 5. The categories for the major functions or requirements for an I/O module are: control and timing, device communication, data buffering, error detection, and _________. processor communication

11. 6. In __________ mode the I/O module and main memory exchange data directly, without processor involvement. direct memory access (DMA) 7. There are four types of I/O commands that an I/O module may receive when it is addressed by a processor: control, test, write, and _________. read 8. When the processor, main memory, and I/O share a common bus, two modes of addressing are possible: memory mapped and ________. isolated 9. The ________ is a single-chip, general-purpose I/O module designed for use with the Intel 80386 processor. 82C55A 10. A ________ controls multiple high-speed devices and, at any one time, is dedicated to the transfer of data with one of those devices. selector channel

12. 11. In a _________ interface there are multiple lines connecting the I/O module and the peripheral and multiple bits are transferred simultaneously. parallel 12. In a ________ interface there is only one line used to transmit data and bits must be transmitted one at a time. serial 13. The most recent, and fastest, peripheral connection technology to become available for general-purpose use is __________, developed by Intel with collaboration from Apple. Thunderbolt 14. ________ enables servers, remote storage, and other network devices to be attached in a central fabric of switches and links, connecting up to 64,000 servers, storage systems, and networking devices. InfiniBand 15. A ________ machine is an instance of an operating system along with one or more applications running in an isolated memory partition within the computer, enabling different operating systems to run in the same computer at the same time, as well as preventing applications from interfering with each other. virtual

13. Chapter 8 - Operating System Support 8.1 Operating System Overview 8.2 Scheduling 8.3 Memory Management 8.4 Pentium Memory Management 8.5 ARM Memory Management

14. Key Terms batch system demand paging interactive operating system interrupt job control language (JCL) kernel logical address long-term scheduling medium-term scheduling memory management memory protection multiprogramming multitasking nucleus operating system (OS) paging page table partitioning physical address privileged instruction process process control block process state real memory resident monitor segmentation short-term scheduling swapping thrashing time-sharing system translation lookaside buffer (TLB) utility virtual memory

15. List and briefly define the key services provided by an OS. Program creation: The operating system provides a variety of facilities and services, such as editors and debuggers, to assist the programmer in creating programs. Program execution: A number of tasks need to be performed to execute a program. Instructions and data must be loaded into main memory, I/O devices and files must be initialized, and other resources must be prepared. Access to I/O devices: Each I/O device requires its own peculiar set of instructions or control signals for operation. Controlled access to files: In the case of files, control must include an understanding of not only the nature of the I/O device (disk drive, tape drive) but also the file format on the storage medium. System access: In the case of a shared or public system, the operating system controls access to the system as a whole and to specific system resources. Error detection and response: A variety of errors can occur while a computer system is running. Accounting: A good operating system will collect usage statistics for various resources and monitor performance parameters such as response time. REVIEW QUESTIONS

16. 8.3 List some of the main problems faced by earlier versions of OS. - Scheduling: Most installations used a sign-up sheet to reserve processor time. Typically, a user could sign up for a block of time in multiples of a half hour or so. A user might sign up for an hour and finish in 45 minutes; this would result in wasted computer idle time. On the other hand, the user might run into problems, not finish in the allotted time, and be forced to stop before resolving the problem. - Setup time: A single program, called a job, could involve loading the compiler plus the high-level language program (source program) into memory, saving the compiled program (object program), and then loading and linking together the object program and common functions. Each of these steps could involve mounting or dismounting tapes, or setting up card decks. If an error occurred, the hapless user typically had to go back to the beginning of the setup sequence. Thus a considerable amount of time was spent just in setting up the program to run.

17. 8.4 What is the difference between a process and a program? A process is a program in execution, together with all the state information required for execution.

18. 8.5 What are the diffenent types of scheduling? Long-term scheduling The decision to add to the pool of processes to be executed Medium-term scheduling The decision to add to the number of processes that are partially or fully in main memory Short-term scheduling The decision as to which available process will be executed by the processor I/O scheduling The decision as to which process’s pending I/O request shall be handled by an available I/O device

19. 8.6 If a process may be dynamically assigned to different locations in main memory, what is the implication for the addressing mechanism? Addresses must be dynamic in the sense that absolute addresses are only resolved during loading or execution.

20. 8.7 Is it necessary for all of the pages of a process to be in main memory while the process is executing? No, if virtual memory is used.

21. 8.8 Must the pages of a process in main memory be contiguous? No.

22. 8.9 Is it necessary for the pages of a process in main memory to be in sequential order? No.

23. 8.10 What are the different states of a process? New: A program is admitted by the high-level scheduler but is not yet ready to execute. The OS will initialize the process, moving it to the ready state. Ready: The process is ready to execute and is awaiting access to the processor. Running: The process is being executed by the processor. Waiting: The process is suspended from execution waiting for some system resource, such as I/O. Halted: The process has terminated and will be destroyed by the OS.

24. SHORT ANSWER 1. The _________ is a program that manages the computer’s resources, provides services for programmers, and schedules the execution of other programs. operating system (OS) 2. Three key interfaces in a typical computer system are: instruction set architecture, application programming interface, and ___________. application binary interface (ABI) 3. The __________, or nucleus, contains the most frequently used functions in the OS. kernel 4. In an _________ system the user/programmer interacts directly with the computer, usually through a keyboard/display terminal to request the execution of a job or to perform a transaction. interactive 5. A _________ system groups the user’s program with programs for other users and is submitted by a computer operator, with results being printed out for the user upon completion of the program. batch

25. 6. Early computer systems presented two main problems: setup time and _____. scheduling 7. The portion of the monitor that must always be in main memory and available for execution is referred to as the __________. resident monitor 8. The technique where memory is expanded to hold three, four, or more programs and switch among all of them is __________, (or multitasking). multiprogramming 9. In a _________ system multiple users simultaneously access the system through terminals, with the OS interleaving the execution of each user program in a short burst or quantum of computation. time-sharing 10. The five defined states for a process are: new, ready, waiting, halted, and ________. running

26. 11. Each process is represented in the OS by a ___________, which typically contains identifier, state, priority, program counter, memory pointers, context data, I/O status information, and accounting information. process control block 12. Because a process executes only in main memory, that memory is referred to as __________. real memory 13. __________ allows the programmer to view memory as consisting of multiple address spaces or segments. Segmentation 14. When the processor executes a process it automatically converts from logical to physical address by adding the current starting location of the process, called its __________, to each logical address. base address 15. _________ paging means that each page of a process is brought in only when it is needed. Demand

27. PART THREE ARITHMETIC AND LOGIC Chapter 9 - Number Systems 9.1 The Decimal System 9.2 Positional Number Systems 9.3 The Binary System 9.4 Converting Between Binary and Decimal 9.5 Hexadecimal Notation

28. Key Terms base binary decimal fraction hexadecimal integer least significant digit most significant digit nibble positional number system radix radix point

29. SHORT ANSWER In everyday life we use a system based on decimal digits to represent numbers, and refer to the system as the __________. decimal system In any number, the leftmost digit is referred to as the __________ digit because it carries the highest value. most significant The rightmost digit is called the _________ digit. least significant In the decimal system, _________ is the maximum value that a position can hold before it flips over into the next higher position. 9 In a __________ number system, each number is represented by a string of digits in which each digit position i has an associated weight r i, where r is the radix of the number system. positional

30. The _________ system has only two digits, 0 and 1. binary In the _________ system, 10 different digits are used to represent numbers with a base of 10. decimal Binary digits grouped into sets of four bits are called a _________. nibble To convert a number from binary notation to decimal notation all that is required is to multiply each binary digit by the appropriate power of ________ and add the results. 2 The decimal system has a radix of _________. 10

31. Because 16 symbols are used, the notation is called hexadecimal and the 16 symbols are the __________. hexadecimal digits Given (... a 3 a 2 a 1 a 0.a -1 a -2 a -3... ) r, the dot between a 0 and a -1 is called the ________. radix point In the decimal system, ________ different digits are used to represent numbers with a base of 10. 10 (2 x 10 -1 ) + (5 x 10 -2 ) + (6 x 10 -3 ) represents the number _________. 0.256 Binary 0001 0000 0000 represents ________ in hexadecimal. 100

32. Chapter 10 - Computer Arithmetic 10.1 The Arithmetic and Logic Unit 10.2 Integer Representation 10.3 Integer Arithmetic 10.4 Floating-Point Representation 10.5 Floating-Point Arithmetic

33. Key Terms arithmetic and logic unit (ALU) arithmetic shift base biased representation dividend divisor exponent exponent overflow exponent underflow fixed-point representation floating-point representation guard bits mantissa minuend multiplicand multiplier negative overflow negative underflow normal number ones complement representation overflow partial product positive overflow positive underflow product quotient radix point remainder rounding sign bit significand significand overflow significand underflow sign-magnitude representation subnormal number subtrahend twos complement representation

34. SHORT ANSWER The _________ is that part of the computer that actually performs arithmetic and logical operations on data. Arithmetic and Logic Unit (ALU) Extending the range of numbers that can be expressed by increasing the bit length is referred to as __________. range extension _________ representation is when the radix point is fixed and assumed to be to the right of the rightmost digit. Fixed point If two numbers are added, and they are both positive or both negative, then _________ occurs if and only if the result has the opposite sign. overflow “To subtract one number from another, take the twos complement of the subtrahend and add it to the minuend” is the _________ rule. subtraction

35. When the divisor is able to divide the number, a 1 is placed in the quotient and the divisor is subtracted from the partial dividend; the result is referred to as a ________. partial remainder A __________ is one in which the most significant digit of the significand is nonzero. normal number _________ occurs when an arithmetic operation results in an absolute value greater than can be expressed with an exponent of 128. Overflow The most important floating-point representation is defined in IEEE Standard _________, adopted in 1985 and revised in 2008. 754 __________ format is a fully specified, fixed-length binary encoding that allows data interchange between different platforms and that can be used for storage. Interchange

36. _________ format covers five floating-point representations, three binary and two decimal, whose encodings are specified by the standard, and which can be used for arithmetic. Basic IEEE 754-2008 defines an __________ format as a format with a precision and range that are defined under user control. extendable precision The register contains additional bits, called __________, which are used to pad out the right end of the significand with 0s. guard bits __________ is when the result is put back into the floating-point format and the extra bits must be eliminated in such a way as to produce a result that is close to the exact result. Rounding The use of subnormal numbers is referred to as _________ underflow. gradual

37. Chapter 11 - Digital Logic 11.1 Boolean Algebra 11.2 Gates 11.3 Combinational Circuits 11.4 Sequential Circuits 11.5 Programmable Logic Devices

38. Key Terms adder AND gate assert Boolean algebra clocked S–R flip-flop combinational circuit complex PLD (CPLD) counter decoder D flip-flop excitation table field-programmable gate array (FPGA) flip-flop gates graphical symbol J–K flip-flop Karnaugh map logic block lookup table multiplexer NAND gate NOR OR gate parallel register product of sums (POS) programmable array logic (PAL) programmable logic array (PLA) programmable logic device (PLD) Quine–McCluskey method read-only memory (ROM) register ripple counter sequential circuit shift register simple PLD (SPLD) sum of products (SOP) synchronous counter S–R Latch truth table XOR gate

39. SHORT ANSWER The digital circuitry in digital computers and other digital systems is designed, and its behavior is analyzed, with the use of a mathematical discipline known as __________. Boolean algebra The basic logical operations of Boolean algebra are AND, OR, and ________. NOT The fundamental building block of all digital logic circuits is the _______. gate Each gate is defined in three ways: graphic symbol, algebraic notation, and __________. truth table To ________ a signal is to cause a signal line to make a transition from its logically false (0) state to its logically true (1) state. assert

40. A ________ is an interconnected set of gates whose output at any time is a function only of the input at that time. combinational circuit A combinational circuit can be defined by Boolean equations, truth table, and _________. graphical symbols Consisting of an array of 2” squares representing all possible combinations of values of n binary variables, the _________ is a convenient way of representing a Boolean function of a small number (up to four) of variables. Karnaugh map The _________ connects multiple inputs to a single output. multiplexer A _________ is a combinational circuit with a number of output lines, only one of which is asserted at any time. decoder

41. The simplest form of sequential circuit is the _________. flip-flop A ________ is a register whose value is easily incremented by 1 modulo the capacity of the register. counter An asynchronous counter is also referred to as a ________ because the change that occurs to increment the counter starts at one end and “ripples” through to the other end. ripple counter A _________ is a relatively small PLD that contains two levels of logic, an AND-plane and an OR-plane, where both levels are programmable. programmable logic array (PLA) Also referred to as a field-programmable device (FPD), a __________ refers to any type of integrated circuit used for implementing digital hardware, where the chip can be configured by the end user to realize different designs. programmable logic device (PLD)

42. PART FOUR THE CENTRAL PROCESSING UNIT Chapter 12 - Instruction Sets: Characteristics and Functions 12.1 Machine Instruction Characteristics 12.2 Types of Operands 12.3 Intel x86 and ARM Data Types 12.4 Types of Operations 12.5 Intel x86 and ARM Operation Types

43. Key Terms accumulator address arithmetic shift bi-endian big endian branch conditional branch instruction set jump little endian logical shift machine instruction operand operation packed decimal pop procedure call procedure return push reentrant procedure reverse Polish notation rotate skip stack

44. 12.1 What are the typical elements of a machine instruction? The essential elements of a computer instruction are the opcode, which specifies the operation to be performed, the source and destination operand references, which specify the input and output locations for the operation, and a next instruction reference, which is usually implicit. REVIEW QUESTIONS

45. 12.2 What types of locations can hold source and destination operands? Registers and memory.

46. 12.3 If an instruction contains four addresses, what might be the purpose of each address? Two operands, one result, and the address of the next instruction.

47. 12.4 List and briefly explain five important instruction set design issues. Operation repertoire: How many and which operations to provide, and how complex operations should be. Data types: The various types of data upon which operations are performed. Instruction format: Instruction length (in bits), number of addresses, size of various fields, and so on. Registers: Number of CPU registers that can be referenced by instructions, and their use. Addressing: The mode or modes by which the address of an operand is specified.

48. 12.5 What types of operands are typical in machine instruction sets? Addresses, numbers, characters, logical data.

49. 12.6 What is the relationship between the IRA character code and the packed decimal representation? For the IRA bit pattern 011XXXX, the digits 0 through 9 are represented by their binary equivalents, 0000 through 1001, in the right-most 4 bits. This is the same code as packed decimal.

50. 12.7 What is the difference between an arithmetic shift and a logical shift? With a logical shift, the bits of a word are shifted left or right. On one end, the bit shifted out is lost. On the other end, a 0 is shifted in. The arithmetic shift operation treats the data as a signed integer and does not shift the sign bit. On a right arithmetic shift, the sign bit is replicated into the bit position to its right. On a left arithmetic shift, a logical left shift is performed on all bits but the sign bit, which is retained.

51. 12.8 Why are transfer of control instructions needed? 1. In the practical use of computers, it is essential to be able to execute each instruction more than once and perhaps many thousands of times. It may require thousands or perhaps millions of instructions to implement an application. This would be unthinkable if each instruction had to be written out separately. If a table or a list of items is to be processed, a program loop is needed. One sequence of instructions is executed repeatedly to process all the data. 2. Virtually all programs involve some decision making. We would like the computer to do one thing if one condition holds, and another thing if another condition holds. 3. To compose correctly a large or even medium-size computer program is an exceedingly difficult task. It helps if there are mechanisms for breaking the task up into smaller pieces that can be worked on one at a time.

52. 12.9 List and briefly explain two common ways of generating the condition to be tested in a conditional branch instruction. First, most machines provide a 1-bit or multiple-bit condition code that is set as the result of some operations. Another approach that can be used with a three-address instruction format is to perform a comparison and specify a branch in the same instruction.

53. 12.10 What is meant by the term nesting of procedures? The term refers to the occurrence of a procedure call inside a procedure.

54. 12.11 List three possible places for storing the return address for a procedure return. Register, start of procedure, top of stack.

55. SHORT ANSWER 1. The operation of the processor is determined by the instructions it executes, referred to as _________ or computer instructions. machine instructions 2. The collection of different instructions that the processor can execute is referred to as the processor’s _________. instruction set 3. The __________ reference tells the processor where to fetch the next instruction after the execution of this instruction is complete. next instruction 4. Source and result operands can be in one of four areas: main or virtual memory, immediate, I/O device, and _________. processor register 5. Opcodes are represented by abbreviations, called __________ that indicate the operation. mnemonics

56. 6. Instruction types can be categorized as: data processing, data storage, control, and ________. data movement 7. Zero-address instructions are applicable to a special memory organizations called a _________, which is a last-in-first-out set of locations. stack 8. The most important general categories of data are: addresses, numbers, characters, and _________. logical data 9. Today the most commonly used character code is the IRA, referred to in the United States as _____________. ASCII (American Standard Code for Information Interchange) 10. ________ instructions are those that change the format or operate on the format of data. Conversion

57. 11. _________ instructions are those that can be executed only while the processor is in a certain privileged state or is executing a program in a special privileged area of memory. System control 12. A self-contained computer program that is incorporated into a larger program is a __________. procedure 13. The x86 provides four instructions to support procedure call/return: CALL, ENTER, LEAVE, and _________. RETURN 14. _________ are bits in special registers that may be set by certain operations and used in conditional branch instructions. Status flags 15. Intel’s ________ technology is a set of highly optimized instructions for multimedia tasks. MMX

58. Chapter 13 - Instruction Sets: Addressing Modes and Formats 13.1 Addressing Modes 13.2 x86 and ARM Addressing Modes 13.3 Instruction Formats 13.4 x86 and ARM Instruction Formats 13.5 Assembly Language

59. Key Terms autoindexing base-register addressing direct addressing displacement addressing effective address immediate addressing indexing indirect addressing instruction format postindexing preindexing register addressing register indirect addressing relative addressing word

60. 13.1 Briefly define immediate addressing. Immediate addressing: The value of the operand is in the instruction. REVIEW QUESTIONS

61. 13.2 Briefly define direct addressing. Direct addressing: The address field contents the effective address of the operand.

62. 13.3 Briefly define indirect addressing. Indirect addressing: The address field refers to the address of a word in memory, which in turn contains the effective address of the operand.

63. 13.4 Briefly define register addressing. Register addressing: The address field refers to a register that contains the operand.

64. 13.5 Briefly define register indirect addressing. Register indirect addressing: The address field refers to a register, which in turn contains the effective address of the operand.

65. 13.6 Briefly define displacement addressing. Displacement addressing: The instruction has two address fields, at least one of which is explicit. The value contained in one address field (value = A) is used directly. The other address field refers to a register whose contents are added to A to produce the effective address.

66. 13.7 Briefly define relative addressing. Relative addressing: The implicitly referenced register is the program counter (PC). That is, the current instruction address is added to the address field to produce the EA.

67. 13.8 What is the advantage of autoindexing? It is typical that there is a need to increment or decrement the index register after each reference to it. Because this is such a common operation, some systems will automatically do this as part of the same instruction cycle, using autoindexing.

68. 13.9 What is the difference between postindexing and preindexing? These are two forms of addressing, both of which involve indirect addressing and indexing. With preindexing, the indexing is performed before the indirection. With postindexing, the indexing is performed after the indirection.

69. 13.10 What facts go into determining the use of the addressing bits of an instruction? Number of addressing modes: Sometimes an addressing mode can be indicated implicitly. In other cases, the addressing modes must be explicit, and one or more mode bits will be needed. Number of operands: Typical instructions on today’s machines provide for two operands. Each operand address in the instruction might require its own mode indicator, or the use of a mode indicator could be limited to just one of the address fields. Register versus memory: The more that registers can be used for operand references, the fewer bits are needed. Number of register sets: One advantage of using multiple register sets is that, for a fixed number of registers, a functional split requires fewer bits to be used in the instruction. Address range: For addresses that reference memory, the range of addresses that can be referenced is related to the number of address bits. Because this imposes a severe limitation, direct addressing is rarely used. With displacement addressing, the range is opened up to the length of the address register. Address granularity: In a system with 16- or 32-bit words, an address can reference a word or a byte at the designer’s choice. Byte addressing is convenient for character manipulation but requires, for a fixed-size memory, more address bits.

70. 13.11 What are the advantages and disadvantages of using a variable-length instruction format? Advantages: It easy to provide a large repertoire of opcodes, with different opcode lengths. Addressing can be more flexible, with various combinations of register and memory references plus addressing modes. Disadvantages: an increase in the complexity of the CPU.

71. SHORT ANSWER 1. The actual mapping to a physical address is a function of the _________ and is invisible to the programmer. memory management unit (MMU) 2. The simplest form of addressing is __________ addressing. immediate 3. Not common on contemporary architectures, ___________ requires only one memory reference and no special calculation, but provides only a limited address space. direct addressing 4. Just as register addressing is analogous to direct addressing, ________ addressing is analogous to indirect addressing. register indirect 5. A very powerful mode of addressing, __________ combines the capabilities of direct addressing and register indirect addressing, requiring that the instruction have two address fields, at least one of which is explicit. displacement addressing

72. 6. __________ is when the increment or decrement of the index register after each reference to it is done automatically as part of the same instruction cycle. Autoindexing 7. Sometimes referred to as a pushdown list or last-in-first-out queue, a __________ is a linear array of locations. stack 8. In the __________ mode the instruction includes a displacement to be added to a base register, which may be any of the general-purpose registers. base with displacement 9. A(n) __________ defines the layout of the bits of an instruction in terms of its constituent fields, must include an opcode and, implicitly or explicitly, zero or more operands. instruction format 10. “All instructions should have the ‘natural’ number of operands” and “all operands should have the same generality in specification” are two criteria that were used in designing the __________ instruction format. VAX

73. 11. __________ explicitly specifies which segment register an instruction should use, overriding the default segment-register selection generated by the x86 for that instruction. Segment override 12. The _________ byte specifies whether an operand is in a register or in memory, and if it is in memory, then fields within the byte specify the addressing mode to be used. ModR/M 13. The __________ instruction set is designed to increase the performance of ARM implementations that use a 16-bit or narrower memory data bus and to allow better code density than provided by the ARM instruction set. Thumb 14. Programs written in assembly language are translated into machine language by an _________. assembler 15. If a programmer wished to program directly in machine language it would be necessary to enter the program as ________ data. binary