1. Rendering pipeline: The hardware side
Zoltán Szandtner,
college assistant lecturer of Department of Basic and Technical Sciences of DGC
3D Graphics Professional Days 2016.

2. I. Why are GPUs important?
Figure 1 – Intel CPU Trends [1]
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

3. II. The graphics pipeline /1
Traditional pipeline
…and its modern implementation
Figure 2 – Graphics Pipeline [WikiMedia Commons]
In layman’s terms
Figure 3 – OpenGL infographic by Shamus Young [2]
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

4. II. The graphics pipeline /2
Figure 3 – OpenGL infographic by Shamus Young [2]
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

5. III. Brief history of Graphics Cards & GPUs /1
Figure 4 – IBM Monochrome Display Adapter [Wikimedia Commons]
„1st generation”: Focus on 2D end of the pipeline
improving resolution & color depth  SVGA standard
On-board RAMDAC buffer  video memory precursor
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

6. III. Brief history of Graphics Cards & GPUs /2
Figure 5 – 3Dfx Voodoo [vgamuseum.ru]
2nd generation: 3D accelerators & 1st GPUs
Graphics APIs: Glide, OpenGL, DirectX
Hardware is a fixed-function pipeline, i.e. fixed, „built-in math operations”
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

7. III. Brief history of Graphics Cards & GPUs /3
Figure 6 – GeForce3 ti [vgamuseum.ru]
3rd generation: GPUs with programmable shader support
First pixel, then vertex shaders are programmable
Shader „languages”: GLSL (OpenGL), HLSL (DirectX)
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

8. III. Brief history of Graphics Cards & GPUs /4
Figure 6 – ATI Radeon HD 2000 [vgamuseum.ru]
4th generation: Modern GPUs with Unified Shader Architecture
Figure 7 – Fixed-function vs Unified Shader Models [WikiMedia Commons]
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

9. IV. A note on Intel integrated GPUs:
Figure 8 – GPU market shares Nvidia/ATI/Intel [WikiMedia Commons]
„Intel is also doing a lot better with their integrated graphics parts, once the butt of jokes, but they've taken a couple of steps now which are fully competent parts” – John Carmack, 2011
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

10. V. Modern GPU architecture
Figure 9 – Typical CPU vs GPU circuit area ratios [3]
Majority of a GPU wafer assigned to execution units
Classic „brainiac” vs. „speedracer”  work smart vs. hard
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

11. Zoltán Szandtner - Rendering pipeline: the hardware side
VI. Why speedracer?
Graphics processing (usually) embarrassingly parallel
Simpler control is sufficient
Workload is greatly predictable
Logic optimization can focus on throughput vs latency
Data shows very high locality
Memory architecture can be likewise throughput focused
GPU code (typically) compiled at runtime
VLIW like static scheduling can be employed
More area can be assigned to execution units
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

12. VII. NVidia SIMT (CUDA) Architecture in Detail /1
Figure 10 – CUDA blocks & memory model [3]
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

13. VII. NVidia SIMT (CUDA) Architecture in Detail /2
Figure 11 – SMP architecture [4]
Figure 12 – Maxwell GPU architecture [4]
Grid  Entire GPU; Block  SMP; Thread  SP
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

14. VIII. How much faster are GPUs? /1 - Theory
Figure 13 – Theoretical difference [3]
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

15. VIII. How much faster are GPUs? /2 - Reality
Figure 14 – Measured difference [5]
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side

16. Zoltán Szandtner - Rendering pipeline: the hardware side
Proceedings of the 37th Annual International Symposium on Computer Architecture
IX. References
[1] H. Sutter, „The Free Lunch Is Over: A Fundamental Turn Toward Concurrency in Software,” Dr. Dobb's Journal, web, vol. 30, no. 3, March 2005.
[2] Young Shamus „ The Strange Evolution of OpenGL Part 2”, Twenty Sided Blog, web
[3] Nvidia, „CUDA Programming Guide”, web, 2015, CUDA_ProgrammingGuide.pdf
[4] Nicholas Wilt, „The CUDA Handbook”, Crawfordsville, Indiana, 2013
[5 ] V. W. Lee, C. Kim, J. Chhugani, M. Deisher, D. Kim, A. D. Nguyen, N. Satish, M. Smelyanskiy, S. Chennupaty, P. Hammarlund, R. Singhal and P. Dubey, „Debunking the 100X GPU vs. CPU Myth: An Evaluation of Throughput Computing on CPU and GPU,” SIGARCH Comput. Archit. News, vol. 1. no.3 , pg , 2010.
3D Graph. Prof. Days 2016.
Zoltán Szandtner - Rendering pipeline: the hardware side