1. Memory Management & Virtual Memory

2. Hierarchy Cache Memory : Provide invisible speedup to main memory

3. Hierarchy Virtual Memory : Provide invisible extension to main memory

4. Memory Management – Turns Logical addresses used by processor into physical addresses in memory

5. Terminology Virtual/Logical Address : – Address program uses – Size determined by bits in memory address Physical Address : – Determined by available memory

6. Virtual Memory How Why? – Logical space can be independent of physical space – Programs don't have to care about hardware

7. Virtual Memory Why? – Allow programs to use more main memory than is physically present

8. Virtual Memory How Why? – Allows multiple programs to coexist

9. Virtual Memory How Why? – Allows multiple programs to coexist Everyone can use same logical addresses

10. Virtual Memory How Why? – Allows multiple programs to coexist invisibly Some memory can be shared by processes

11. Virtual Memory How Why? – Allows multiple programs to coexist invisibly Memory Management Unit can prevent access to unowned memory

12. Terminology Page : block of memory in logical address space Page Frame : location in physical memory a page is placed

13. Terminology Page Fault : request for a page that is not in physical memory Paging : copying desired page from hard drive to RAM I need this address:

14. Terminology Page Fault : request for a page that is not in physical memory Paging : copying desired page from hard drive to RAM I need this address: Bring in from hard drive

15. Terminology Page Fault : request for a page that is not in physical memory Paging : copying desired page from hard drive to RAM I need this address: Bring in from hard drive Record where I put it 3

16. Process 24 bit addresses – 2^16 = 16 MB logical address space

17. Process 24 bit addresses – 2^24 = 16 MB logical address space Pages will be 64Kb – 2^16 bytes in page – 16 bit address inside page

18. Process 24 bit addresses – 2^24 = 16 MB logical address space Pages will be 64Kb – 2^16 bytes in page – 16 bit address inside page 256 pages of memory – 2^24 / 2^16 = 2^8 – Page table has 256 entries

19. Process 24 bit addresses – 2^24 = 16 MB logical address space Pages will be 64Kb – 2^16 bytes in page – 16 bit address inside page 256 pages of memory – 2^24 / 2^16 = 2^8 – Page table has 256 entries 512 KB physical memory – 512 K / 64 K = 8 – 8 page frames of physical memory – 3 bit frame addresses

20. Need logical address 0000 0111 0000 1010 0011 0010 Process

21. Need logical address 0000 0111 0000 1010 0011 0010 Break into: – Logical page 0000 0111 – Address inside page 0000 1010 0011 0010

22. Process Need logical address 0000 0111 0000 1010 0011 0010 Break into: – Logical page 0000 0111 – Address inside page 0000 1010 0011 0010 Lookup page in page table – Page is resident (in memory) – At 110

23. Process Need logical address 0000 0111 0000 1010 0011 0010 Break into: – Logical page 0000 0111 – Address inside page 0000 1010 0011 0010 Lookup page in page table – Page is resident (in memory) – At frame address 110 Create physical address from frame + offset – 110 0000 1010 0011 0010

24. Page Sizes Small page size = larger page table

25. Page Sizes Small page size = larger page table Large page size = more unused data in pages

26. Paging & Caching Page table held in main memory by OS

27. Paging & Caching Page table held in main memory by OS Every mapping goes to main memory… Cache is worthless!

28. TLB Transition look-aside buffer Cache for page table – Subset of page table – Fully associative – May be multiple levels