1. Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ CprE 281: Digital Logic

2. Multiplication CprE 281: Digital Logic Iowa State University, Ames, IA Copyright © Alexander Stoytchev

3. Administrative Stuff HW 6 is out It is due on Monday March 3 @ 4pm

4. Quick Review

5. The story with floats is more complicated IEEE 754-1985 Standard [http://en.wikipedia.org/wiki/IEEE_754]

6. In the example shown above, the sign is zero so s is +1, the exponent is 124 so e is −3, and the significand m is 1.01 (in binary, which is 1.25 in decimal). The represented number is therefore +1.25 × 2 −3, which is +0.15625. [http://en.wikipedia.org/wiki/IEEE_754]

7. Figure 3.37. IEEE Standard floating-point formats. Sign 32 bits 23 bits of mantissa excess-127 exponent 8-bit 52 bits of mantissa11-bit excess-1023 exponent 64 bits Sign SM SM (a) Single precision (b) Double precision E + E 0 denotes – 1 denotes

8. On-line IEEE 754 Converters http://www.h-schmidt.net/FloatApplet/IEEE754.html http://babbage.cs.qc.edu/IEEE-754/Decimal.html

10. The Full-Adder Circuit [ Figure 3.3c from the textbook ]

11. The Full-Adder Circuit [ Figure 3.3c from the textbook ] Let's take a closer look at this.

12. yiyi xixi cici c i+1 = x i y i + (x i + y i )c i Another Way to Draw the Full-Adder Circuit

13. Decomposing the Carry Expression c i+1 = x i y i + x i c i + y i c i

14. Decomposing the Carry Expression c i+1 = x i y i + x i c i + y i c i c i+1 = x i y i + (x i + y i )c i

15. Decomposing the Carry Expression yiyi xixi c i+1 cici c i+1 = x i y i + x i c i + y i c i c i+1 = x i y i + (x i + y i )c i

16. Another Way to Draw the Full-Adder Circuit yiyi xixi cici c i+1 sisi c i+1 = x i y i + x i c i + y i c i c i+1 = x i y i + (x i + y i )c i

17. Another Way to Draw the Full-Adder Circuit yiyi xixi cici c i+1 sisi c i+1 = x i y i + (x i + y i )c i

18. Another Way to Draw the Full-Adder Circuit c i+1 = x i y i + (x i + y i )c i yiyi xixi cici c i+1 sisi gigi pipi

19. Another Way to Draw the Full-Adder Circuit c i+1 = x i y i + (x i + y i )c i yiyi xixi cici c i+1 sisi gigi pipi gigi pipi

20. Yet Another Way to Draw It (Just Rotate It) cici c i+1 sisi xixi yiyi pipi gigi

21. x 1 y 1 g 1 p 1 s 1 Stage 1 x 0 y 0 g 0 p 0 s 0 Stage 0 c 0 c 1 c 2 Now we can Build a Ripple-Carry Adder [ Figure 3.14 from the textbook ]

22. x 1 y 1 g 1 p 1 s 1 Stage 1 x 0 y 0 g 0 p 0 s 0 Stage 0 c 0 c 1 c 2 Now we can Build a Ripple-Carry Adder [ Figure 3.14 from the textbook ]

23. x 1 y 1 g 1 p 1 s 1 Stage 1 x 0 y 0 g 0 p 0 s 0 Stage 0 c 0 c 1 c 2 The delay is 5 gates (1+2+2)

24. x 1 y 1 g 1 p 1 s 1 Stage 1 x 0 y 0 g 0 p 0 s 0 Stage 0 c 0 c 1 c 2 n-bit ripple-carry adder: 2n+1 gate delays...

25. Decomposing the Carry Expression c i+1 = x i y i + x i c i + y i c i c i+1 = x i y i + (x i + y i )c i gigi pipi c i+1 = g i + p i c i c i+1 = g i + p i (g i-1 + p i-1 c i-1 ) = g i + p i g i-1 + p i p i-1 c i-1

26. Carry for the first two stages c 1 = g 0 + p 0 c 0 c 2 = g 1 + p 1 g 0 + p 1 p 0 c 0

27. The first two stages of a carry-lookahead adder [ Figure 3.15 from the textbook ]

28. It takes 3 gate delays to generate c 1

29. It takes 3 gate delays to generate c 2

30. The first two stages of a carry-lookahead adder 2 c

31. It takes 4 gate delays to generate s 1 2 c

32. It takes 4 gate delays to generate s 2

33. N-bit Carry-Lookahead Adder It takes 3 gate delays to generate all carry signals It takes 1 more gate delay to generate all sum bits Thus, the total delay through an n-bit carry-lookahead adder is only 4 gate delays!

34. Expanding the Carry Expression c 1 = g 0 + p 0 c 0 c 2 = g 1 + p 1 g 0 + p 1 p 0 c 0 c i+1 = g i + p i c i c 3 = g 2 + p 2 g 1 + p 2 p 1 g 0 + p 2 p 1 p 0 c 0 c 8 = g 7 + p 7 g 6 + p 7 p 6 g 5 + p 7 p 6 p 5 g 4 + p 7 p 6 p 5 p 4 g 3 + p 7 p 6 p 5 p 4 p 3 g 2 + p 7 p 6 p 5 p 4 p 3 p 2 g 1 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 g 0 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 p 0 c 0...

35. Expanding the Carry Expression c 1 = g 0 + p 0 c 0 c 2 = g 1 + p 1 g 0 + p 1 p 0 c 0 c i+1 = g i + p i c i c 3 = g 2 + p 2 g 1 + p 2 p 1 g 0 + p 2 p 1 p 0 c 0 c 8 = g 7 + p 7 g 6 + p 7 p 6 g 5 + p 7 p 6 p 5 g 4 + p 7 p 6 p 5 p 4 g 3 + p 7 p 6 p 5 p 4 p 3 g 2 + p 7 p 6 p 5 p 4 p 3 p 2 g 1 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 g 0 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 p 0 c 0... Even this takes only 3 gate delays

36. Block x 3124– c 32 c 24 y 3124– s 3124– x 158– c 16 y 158– s 8– c 8 x 70– y 70– s 70– c 0 3 Block 1 0 A hierarchical carry-lookahead adder with ripple-carry between blocks [ Figure 3.16 from the textbook ]

37. [ Figure 3.17 from the textbook ] A hierarchical carry-lookahead adder

38. The Hierarchical Carry Expression c 8 = g 7 + p 7 g 6 + p 7 p 6 g 5 + p 7 p 6 p 5 g 4 + p 7 p 6 p 5 p 4 g 3 + p 7 p 6 p 5 p 4 p 3 g 2 + p 7 p 6 p 5 p 4 p 3 p 2 g 1 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 g 0 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 p 0 c 0

39. The Hierarchical Carry Expression c 8 = g 7 + p 7 g 6 + p 7 p 6 g 5 + p 7 p 6 p 5 g 4 + p 7 p 6 p 5 p 4 g 3 + p 7 p 6 p 5 p 4 p 3 g 2 + p 7 p 6 p 5 p 4 p 3 p 2 g 1 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 g 0 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 p 0 c 0

40. The Hierarchical Carry Expression c 8 = g 7 + p 7 g 6 + p 7 p 6 g 5 + p 7 p 6 p 5 g 4 + p 7 p 6 p 5 p 4 g 3 + p 7 p 6 p 5 p 4 p 3 g 2 + p 7 p 6 p 5 p 4 p 3 p 2 g 1 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 g 0 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 p 0 c 0 G0G0 P0P0

41. The Hierarchical Carry Expression c 8 = g 7 + p 7 g 6 + p 7 p 6 g 5 + p 7 p 6 p 5 g 4 + p 7 p 6 p 5 p 4 g 3 + p 7 p 6 p 5 p 4 p 3 g 2 + p 7 p 6 p 5 p 4 p 3 p 2 g 1 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 g 0 + p 7 p 6 p 5 p 4 p 3 p 2 p 1 p 0 c 0 G0G0 P0P0 c 8 = G 0 + P 0 c 0

42. The Hierarchical Carry Expression c 8 = G 0 + P 0 c 0 c 16 = G 1 + P 1 c 8 = G 1 + P 1 G 0 + P 1 P 0 c 0 c 24 = G 2 + P 2 G 1 + P 2 P 1 G 0 + P 2 P 1 P 0 c 0 c 32 = G 3 + P 3 G 2 + P 3 P 2 G 1 + P 3 P 2 P 1 G 0 + P 3 P 2 P 1 P 0 c 0

43. [ Figure 3.17 from the textbook ] A hierarchical carry-lookahead adder

45. Decimal Multiplication by 10 What happens when we multiply a number by 10? 4 x 10 = ? 542 x 10 = ? 1245 x 10 = ?

46. Decimal Multiplication by 10 What happens when we multiply a number by 10? 4 x 10 = 40 542 x 10 = 5420 1245 x 10 = 12450

47. Decimal Multiplication by 10 What happens when we multiply a number by 10? 4 x 10 = 40 542 x 10 = 5420 1245 x 10 = 12450 You simply add a zero as the rightmost number

48. Decimal Division by 10 What happens when we divide a number by 10? 14 / 10 = ? 540 / 10 = ? 1240 x 10 = ?

49. Decimal Division by 10 What happens when we divide a number by 10? 14 / 10 = 1 //integer division 540 / 10 = 54 1240 x 10 = 124 You simply delete the rightmost number

50. Binary Multiplication by 2 What happens when we multiply a number by 2? 011 times 2 = ? 101 times 2 = ? 110011 times 2 = ?

51. Binary Multiplication by 2 What happens when we multiply a number by 2? 011 times 2 = 0110 101 times 2 = 1010 110011 times 2 = 1100110 You simply add a zero as the rightmost number

52. Binary Multiplication by 4 What happens when we multiply a number by 4? 011 times 4 = ? 101 times 4 = ? 110011 times 4 = ?

53. Binary Multiplication by 4 What happens when we multiply a number by 4? 011 times 4 = 01100 101 times 4 = 10100 110011 times 4 = 11001100 add two zeros in the last two bits and shift everything else to the left

54. Binary Multiplication by 2 N What happens when we multiply a number by 2 N ? 011 times 2 N = 01100…0 // add N zeros 101 times 4 = 10100…0 // add N zeros 110011 times 4 = 11001100…0 // add N zeros

55. Binary Division by 2 What happens when we divide a number by 2? 0110 divided by 2 = ? 1010 divides by 2 = ? 110011 divides by 2 = ?

56. Binary Division by 2 What happens when we divide a number by 2? 0110 divided by 2 = 011 1010 divides by 2 = 101 110011 divides by 2 = 11001 You simply delete the rightmost number

57. Decimal Multiplication By Hand [http://www.ducksters.com/kidsmath/long_multiplication.php]

58. Binary Multiplication By Hand [Figure 3.34a from the textbook]

59. Binary Multiplication By Hand [Figure 3.34b from the textbook]

60. Binary Multiplication By Hand [Figure 3.34c from the textbook]

61. Figure 3.34. Multiplication of unsigned numbers.

62. Figure 3.35. A 4x4 multiplier circuit.

63. Positive Multiplicand Example [Figure 3.36a in the textbook]

64. Negative Multiplicand Example [Figure 3.36b in the textbook]

65. Binary Coded Decimal

66. Table 3.3. Binary-coded decimal digits.

67. Figure 3.38. Addition of BCD digits.

68. Figure 3.39. Block diagram for a one-digit BCD adder.

69. modulebcdadd(Cin,X,Y,S, Cout); inputCin; input[3:0] X,Y; outputreg [3:0] S; outputreg Cout; reg[4:0] Z; always@ (X,Y,Cin) begin Z=X+Y+Cin; if(Z<10) {Cout,S}=Z; else {Cout,S}=Z+6; end endmodule Figure 3.40. Verilog code for a one-digit BCD adder.

70. Figure 3.41. Circuit for a one-digit BCD adder.

71. Questions?

72. THE END