1. Introduction to Computer Science Robert Sedgewick and Kevin Wayne Copyright © 2005 http://www.cs.Princeton.EDU/IntroCS Recap: Combinational Circuits Please subscribe mailing list Please do stop me if you have questions Assignment #1 will be announced later tonight

2. 2 Logic Gates: Fundamental Building Blocks

3. 3 Important laws x + 1 = 1 x + 0 = x x + x = 1 x ． 1 = x x ． 0 = 0 x ． x = 0 DeMorgan Law x ． y = x + y

4. 4 Sum-of-Products Sum-of-products. Systematic procedure for representing a Boolean function using AND, OR, NOT. Form AND term for each 1 in Boolean function. OR terms together. x'yz expressing MAJ using sum-of-products z xyz'xyzxy'z MAJyx 0 0 0 1 0 1 1 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 x'yz + xy'z + xyz' + xyz 0 0 0 1 0 1 1 1 proves that { AND, OR, NOT } are universal

5. 5 Expressing a Boolean Function Using AND, OR, NOT Ingredients. AND gates. OR gates. NOT gates. Wire. Instructions. Step 1: represent input and output signals with Boolean variables. Step 2: construct truth table to carry out computation. Step 3: derive (simplified) Boolean expression using sum-of products. Optional: simplify Boolean expression Step 4: transform Boolean expression into circuit.

6. 6 Translate Boolean Formula to Boolean Circuit Sum-of-products. XOR.

7. 7 Translate Boolean Formula to Boolean Circuit Sum-of-products. Majority.

8. 8 ODD Parity Circuit ODD(x, y, z). 1 if odd number of inputs are 1. 0 otherwise.

9. 9 Let's Make an Adder Circuit Goal. x + y = z for 4-bit integers. We build 4-bit adder: 9 inputs, 4 outputs. Same idea scales to 128-bit adder. Key computer component. Step 1. Represent input and output in binary. x1x1 x2x2 x3x3 x0x0 y1y1 y2y2 y3y3 y0y0 + z1z1 z2z2 z3z3 z0z0 1000 1101+ 0011 0110 Cin Cout

10. 10 Let's Make an Adder Circuit Goal. x + y = z for 4-bit integers. Step 2. [first attempt] Build truth table. Q. Why is this a bad idea? A. 128-bit adder: 2 256+1 rows >> # electrons in universe! x1x1 x2x2 x3x3 x0x0 y1y1 y2y2 y3y3 y0y0 + z1z1 z2z2 z3z3 z0z0 4-Bit Adder Truth Table y2y2 y3y3 0 0 0 0 1. 1 0 0 0 0 0. 1 x0x0 x1x1 0 0 0 0 0. 1 0 0 0 0 0. 1 x2x2 x3x3 0 0 0 0 0. 1 0 0 0 0 0. 1 y0y0 y1y1 0 1 0 1 0. 1 0 0 1 1 0. 1 z2z2 z3z3 0 0 0 0 1. 1 0 0 0 0 0. 1 z0z0 z1z1 0 1 0 1 0. 1 0 0 1 1 0. 1 2 8+1 = 512 rows! c0c0 0 0 0 0 0. 1 c in c out

11. 11 Let's Make an Adder Circuit Goal. x + y = z for 4-bit integers. Step 3. Derive Boolean expression. MAJ 0 0 0 1 0 1 1 1 ODD 0 1 1 0 1 0 0 1 cici c i+1 yiyi xixi 0 0 0 1 0 1 1 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 cici zizi yiyi xixi 0 1 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 Carry BitSummand Bit x1x1 x2x2 x3x3 x0x0 y1y1 y2y2 y3y3 y0y0 + z1z1 z2z2 z3z3 z0z0 c1c1 c2c2 c3c3 c 0 = 0 c out

12. 12 Let's Make an Adder Circuit Goal. x + y = z for 4-bit integers. Step 4. Transform Boolean expression into circuit. Chain together 1-bit adders.

13. 13 Adder: Interface

14. 14 Subtractor Subtractor circuit: z = x – y. One approach: design like adder circuit

15. 15 Subtractor Subtractor circuit: z = x – y. One approach: design like adder circuit Better idea: reuse adder circuit – 2’s complement: to negate an integer, flip bits, then add 1

16. Introduction to Computer Science Robert Sedgewick and Kevin Wayne Copyright © 2005 http://www.cs.Princeton.EDU/IntroCS Sequential Circuits

17. 17 Review of Combinational Circuits Combinational circuits. Basic abstraction = switch. In principle, can build TOY computer with a combinational circuit. – 255  16 = 4,080 inputs  2 4080 rows in truth table! – no simple pattern – each circuit element used at most once Sequential circuits. Reuse circuit elements by storing bits in "memory." ALU combinational Memory state

18. 18 Combinational vs. Sequential Circuits Combinational circuits. Output determined solely by inputs. Can draw with no loops. Ex: majority, adder, ALU. Sequential circuits. Output determined by inputs and previous outputs. Ex: memory, program counter, CPU.

19. 19 Flip-Flop Flip-flop A small and useful sequential circuit Abstraction that remembers one bit Basis of important computer components for – register – memory – counter There are several flavors

20. 20 S-R flip flop Q=S+RQ Q(t+  )S(t) 00 10 00 00 R(t) 0 0 1 1 Q(t) 0 1 0 1 11 11 1 1 0 0 1 1 0 1 0 1

21. 21 Relay-based flip-flop Ex. Simplest feedback loop. Two relays A and B, both connected to power, each blocked by the other. State determined by whichever switches first. The state is latched. Stable.

22. 22 SR Flip Flop SR flip flop. Two cross-coupled NOR gates. Q=R(S+Q) RSQ 00 01 10 11 R S Q

23. 23 Flip-Flop Flip-flop. A way to control the feedback loop. Abstraction that "remembers" one bit. Basic building block for memory and registers. Caveat. Need to deal with switching delay.

24. 24 Truth Table and Timing Diagram Truth table. Values vary over time. S(t), R(t), Q(t) denote value at time t. Sample timing diagram for SR flip-flop. Q(t+  ) SR Flip Flop Truth Table S(t) 00 10 00 00 R(t) 0 0 1 1 Q(t) 0 1 0 1 11 11 1 1 0 0 1 1 0 1 0 1 Q R S time 1 0 1 0 1 0 

25. 25 Clock Clock. Fundamental abstraction: regular on-off pulse. – on: fetch phase – off: execute phase External analog device. Synchronizes operations of different circuit elements. Requirement: clock cycle longer than max switching time. cycle time Clock on off

26. 26 How much does it Hert? Frequency is inverse of cycle time. Expressed in hertz. Frequency of 1 Hz means that there is 1 cycle per second. – 1 kilohertz (kHz) means 1000 cycles/sec. – 1 megahertz (MHz) means 1 million cycles/sec. – 1 gigahertz (GHz) means 1 billion cycles/sec. – 1 terahertz (THz) means 1 trillion cycles/sec. Heinrich Rudolf Hertz (1857-1894)

27. 27 Clocked S-R flip-flop

28. 28 Clocked D flip-flop

29. 29 Stand-Alone Register

30. 30 Register file interface

31. 31 Register file implementation

32. 32 Multiplexer When s=0, return x; otherwise, return y. Example: (Y  S)  (X   S) Two-input multiplexer

33. 33 4-to-1 multiplexer 4MUX x0x0 x1x1 x2x2 x3x3 z s0s0 s1s1

34. 34 4-to-1 multiplexer 4MUX x0x0 x1x1 x2x2 x3x3 z s0s0 s1s1 2MUX x0x0 x1x1 x2x2 x3x3 z s0s0 s1s1

35. 35 8-to-1 Multiplexer 2 N -to-1 multiplexer N select inputs, 2 N data inputs, 1 output Copies “selected” data input bit to output

36. 36 4-Wide 2-to-1 Multiplexer Goal: select from one of two 4-bit buses

37. 37 4-Wide 2-to-1 Multiplexer Goal: select from one of two 4-bit buses Implemented by layering 4 2-to-1 multiplexer

38. 38 k-Wide n-to-1 Multiplexer Goal: select from one of n k-bit buses Implemented by layering k n-to-1 multiplexer

39. 39 Register file implementation

40. 40 Memory Overview Computers and TOY have several memory components. Program counter. Registers. Main memory. Implementation. Use one flip-flop for each bit of memory. Access. Memory components have different access mechanisms. Organization. Need mechanism to manipulate groups of related bits. TOY has 16 bit words, 8 bit memory addresses, and 4 bit register names.

41. 41 Register Bit Register bit. Extend a flip-flop to allow easy access to values.

42. 42 Register Bit Register bit. Extend a flip-flop to allow easy access to values. XW X W

43. 43 Memory Bit: Interface Memory bit. Extend a flip-flop to allow easy access to values. [ TOY PC, IR ][ TOY main memory ][ TOY registers ]

44. 44 Memory Bit: Switch Level Implementation Memory bit. Extend a flip-flop to allow easy access to values. [ TOY PC, IR ][ TOY main memory ][ TOY registers ]

45. 45 Processor Register Processor register. Stores k bits. Register contents always available on output bus. If enable write is asserted, k input bits get copied into register. Ex 1. TOY program counter (PC) holds 8-bit address. Ex 2. TOY instruction register (IR) holds 16-bit current instruction.

46. 46 Processor Register Processor register. Stores k bits. Register contents always available on output bus. If enable write is asserted, k input bits get copied into register. Ex 1. TOY program counter (PC) holds 8-bit address. Ex 2. TOY instruction register (IR) holds 16-bit current instruction.

47. 47 Processor Register Processor register. Stores k bits. Register contents always available on output bus. If enable write is asserted, k input bits get copied into register. Ex 1. TOY program counter (PC) holds 8-bit address. Ex 2. TOY instruction register (IR) holds 16-bit current instruction.

48. 48 Memory Bank Memory bank. Bank of n registers; each stores k bits. Read and write information to one of n registers. Address inputs specify which one. Addressed bits always appear on output. If write enabled, k input bits are copied into addressed register. Ex 1. TOY main memory. 256-by-16 memory bank. Ex 2. TOY registers. 16-by-16 memory bank. Two output buses. (four 6-bit words) log 2 n address bits needed 2-bit address 6-bit input bus 6-bit output bus

49. 49 Memory: Interface (four 6-bit words)

50. 50 Memory: Component Level Implementation

51. 51 Memory: Switch Level Implementation (four 6-bit words)

52. 52 Summary Sequential circuits add "state" to digital hardware. Flip-flop.[represents 1 bit] TOY word.[16 flip-flops] TOY registers.[16 words] TOY main memory.[256 words] Modern technologies for registers and main memory are different. Few registers, easily accessible, high cost per bit. Huge main memories, less accessible, low cost per bit. Drastic evolution of technology over time. Next. Build a complete TOY computer.