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CAPS FID Interface Board Spring Midterm Presentation I Odai Ali James Owens Joshua Roybal.

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Presentation on theme: "CAPS FID Interface Board Spring Midterm Presentation I Odai Ali James Owens Joshua Roybal."— Presentation transcript:

1 CAPS FID Interface Board Spring Midterm Presentation I Odai Ali James Owens Joshua Roybal

2 Overview Funded under the Future Renewable Electric Energy Delivery and Management Systems Center (FREEDM Center) FREEDM Center goal to develop a demonstration green energy hub on NCSU’s campus Need a fault isolation device (FID) in the green energy hub to act as switch for different parts of the network FID needs a controller 2

3 Problem Statement FID is split into two pieces Fast mechanical switch (FMS) (developed at CAPS) Solid state power electronics (developed at NCSU) Need a controller to bridge the gap of communication between these two systems 3 NCSU Controller CAPS Interface Board

4 Component Prototyping 4

5 Temperature Serial Interface 5 All parts received Interface to DSP tested Temperature readings acquired via SPI Layout complete on PCB

6 Pressure RS485 Interface 6 All parts received Layout complete on PCB Cable assembly in process

7 Logic Level Converter 7 All parts received Interface between DSP and RTDS tested RTDS used to model NCSU’s controller Layout complete on PCB

8 DAC Testing 8 All parts received Breakout board assembled for testing Small smt chip on DIP adaptor board Communication interface programmed and tested PCB layout block complete Ramp rate parameters calculated for 1 ms ramp time to 5 V 1562 symbols transmitted @ 37.5 bps 3.2 mV/sym

9 Piezo State Characterization 9

10 Voltage Divider as Sensor 10 Challenges Requires low source impedance to function with ADC properly ADC relies on charging capacitor to function Requires high impedance in divider to prevent leakage current from discharging the capacitive piezo

11 Voltage Divider as Sensor 11 Tested in simulation Possible to design circuit that minimizes effect on piezo charge/discharge rate Requires high sensor output impedance (resulting in slow ADC operation) Potential solution Buffer input to ADC through op amp (allowing high input impedance with low output impedance) Requires extra PCB layout Requires power supply design for op amp

12 Strain Gauge 12 Secondary voltage feedback may not be necessary Simple strain measure along axis of expansion gives proportional voltage to total elongation or compression of the piezo

13 Strain Gauge Placement 13 Strain Gauge

14 14 This is the original design The piezo comes with a strain gauge in this configuration However, current strain gauge is not functioning (believed to be broken resistor) Requires 4-6 weeks for repair from manufacturer

15 CHIL Setup 15

16 System Modeling 16 Goal: To develop a test bed for the controller without interfacing directly with the piezoelectric actuator Benefits: No worry of damaging piezo through incorrect controller operation Allows for simulation of expected strain gauge feedback control system (without strain gauge on hand) Allows for testing of error states on various components without risk to system

17 Block Diagram 17 Digital Interface Controller Board RTDS Analog Interface Amplifier Model Digital Interface (models NCSU’s controller) Piezo Drive Open Switch Analog Interface Piezo Model Strain Gauge Model DAC ADC Strain Gauge Feedback Controller Interrupt Ramp Symbol Stream Switch Open Trigger

18 Block Diagram Progress 18 Digital Interface Controller Board RTDS Analog Interface Amplifier Model Digital Interface (models NCSU’s controller) Piezo Drive Open Switch Analog Interface Piezo Model Strain Gauge Model DAC ADC Strain Gauge Feedback Controller Interrupt Ramp Symbol Stream Switch Open Trigger

19 Digital Comm Error States 19 Two communication signals from NCSU’s controller Switch StateOpen Switch (s 1 ) Close Switch (s 0 ) Response Closed00Do nothing Closed01Do nothing Closed10Open switch on s 1 edge *Closed11Open switch on s 1 edge Open00Do nothing Open01Close switch on s 0 edge Open10Do nothing *Open11Close switch on s 0 edge *Requires extra timing consideration

20 Timing Considerations 20 The signals are positive edge triggered For cases when both s 1 and s 0 are triggered, the order matters Need to setup CHIL cases to stress timing Open command received during closing Close command received during opening

21 DAC Malfunction Testing 21 Setup CHIL cases for invalid ramp signals Slow operation (> 1ms ramp time) Caused by: Stuck bit on configuration register Heat Results in: Slow switch operation Response: Raise error flag Stopping short of total expected output voltage (< 5 V) Caused by: DAC communication dropped symbols DAC power supply malfunction Results in: Partially open/closed switch Response: Trigger from strain gauge feedback to reinitialize ramp sequence to finish actuating switch

22 Strain Gauge Malfunction Test 22 Setup CHIL cases for invalid strain gauge feedback Strain gauge signal not moving when expected Caused by: Malfunctioning strain gauge or amplifier Malfunctioning piezoelectric actuator Response: Raise error flag

23 Mechanical Switch Testing 23

24 Contact Separation Measurement 24 Test outlined Hang piezo switch assembly in air Energize switch at 10 V increments from 0-150 V Measure displacement of gaps at each voltage level with shims Test is setup in lab Working on secondary method of measuring gap distance Light and screen

25 Setup 25

26 Test Plan Going Forward 26

27 Controller Component Tests 27 Test/ObjectiveStatus Thermocouple Interface/ Verify temperature readings Complete Pressure Interface/ Verify pressure readings In progress DAC Interface/ Verify DAC operation Complete Logic Level Converter/ Verify operation Complete DAC Speed/ Verify DAC ramp rate (1ms) In progress Strain Gauge Feedback/ Verify strain gauge amplifier operation Not started

28 CHIL Tests 28 Test/ObjectiveStatus Switch actuation simulation/ Verify correct communication flow for switch actuation In progress Digital comm error states/ Verify correct operation in error state Not started Ramp error states/ Test switch response to incorrect DAC output Not started Strain error states/ Verify modeled malfunction of strain gauge Not started

29 Mechanical Switch Tests 29 Test/ObjectiveStatus Open Air Static Test/ Determine gap openings at 10 V increments from 0-150 V In progress Open Air Dynamic Test/ Determine switch opening time Not started Low Level Vacuum Test/ Measure temperature response of device to nominal current Not started High Vacuum Voltage Withstand/ Verify switch can withstand voltage at contacts Not started High Vacuum Lightning Test/ Test switch under surge conditions Not started

30 Questions 30

31 Backup 31

32 FID Interface Board Block Design 32 Power amplifier: AE Techron LVC 3622 Open Power supplyPower supply (208 V) Thermocouple amplifier Strain gauge bridge/amplifier RS 232 Serial 0-10 V analog Closed Temp Vacuum Spare Thermocouple Strain gauge Vacuum gauge Piezoelectric actuator DSP board (TI CCS for programming) TI DSP TMS320F28335 Display unit Analog Non evaporable getter

33 Gantt Chart (Nov 2015) 33

34 Gantt Chart (Sep 2015) 34

35 Analysis Algorithm 35 Input strain gauge samples at 30 MHz via ADC Calculate slope of curve at constant data point separation When slope under given threshold, switch is at steady state Using slope method to eliminate different bias levels May need to smooth input data via MA filter to eliminate false slopes

36 Temperature at 100 A 36

37 Temperature at 500 A 37

38 Temperature at 1000 A 38

39 Previous Gen FID 39 There are four main parts in the hybrid FID: FMS: fast mechanical switch AB: auxiliary breaker MB: main breaker MOV: metal oxide varistor Opening procedure of the hybrid FID


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