1. The Memory Hierarchy Lecture 31 20/07/2009Lecture 31_CA&O_Engr. Umbreen Sabir

2. Virtual Memory  When multiple applications (processes) run at the same time, the main memory (DRAM) becomes too small  Virtual memory extends the memory hierarchy to the hard disk, and treats the RAM as “cache” for the hard disk.  This way each process is allocated a portion of the RAM, and each program has its own range of physical memory addresses  Virtual memory “translates” (maps) the virtual addresses of each program to physical addresses in main memory  Protections have to be in place in case of data sharing. 20/07/2009Lecture 31_CA&O_Engr. Umbreen Sabir

3. DRAM Virtual Memory  The CPU generates virtual addresses and memory is accessed by physical addresses  The memory is treated as fully-associative cache, and divided into pages  Translation eliminates the need to find a contiguous block of memory to allocate to a program. page Shared memory 20/07/2009Lecture 31_CA&O_Engr. Umbreen Sabir

4. Virtual Memory - continued  The translation mechanism maps the CPU 32-bit address to the real physical address using a virtual page number and a page offset  Virtual address space is much larger than physical address space (2 20 vs. 2 18 ) 4 GB vs. 1 GB RAM - illusion of infinite memory 20/07/2009Lecture 31_CA&O_Engr. Umbreen Sabir

5. Virtual Memory - continued  The number of page offset bits determines the page size – typically 4 KB to 16 KB) - should be large enough to reduce the chances of page fault  When there is a page fault - millions of clock cycles as penalty - it is treated in software through the exception mechanism.  Software can reduce page faults by cleverly deciding which pages to replace in DRAM (older pages)  Pages always exist on the hard disk, but are loaded into DRAM only when needed.  A write-back mechanism insures that pages that were altered (written into in RAM) are saved on disk before being discarded. 20/07/2009Lecture 31_CA&O_Engr. Umbreen Sabir

6. Virtual Memory - continued  The translation mechanism is provided by a page table  Each program has its own page table which contains the physical addresses of the pages and is indexed by the virtual page number.  Each program when it has possession of the CPU has its pointer to the page table loaded by the OS and its page table is read  Since each process has its own page table, programs can have same virtual address space because the page table will have different mappings for different programs (protection) 20/07/2009Lecture 31_CA&O_Engr. Umbreen Sabir

7. Page Table The size of the page table has to be limited, such that no one process gobbles up the whole physical memory Pointer to the location of the first address of the page table of the active process Valid bit indicates if the page is in DRAM The page table of a process is not fixed- it is altered by the OS to assure different processes do not collide and in case of page faults 20/07/2009Lecture 31_CA&O_Engr. Umbreen Sabir

8. Page Faults  If the Valid Bit is 0 - Page fault - the address points to a page on the hard disk  The page needs to be loaded in DRAM by the OS and the page table written to change the mapping to a new address in physical memory and turn the Valid Bit to 1  If physical memory is full, an existing page needs to be discarded before a new page is loaded from disk  OS uses least-recently used scheme  It uses a reference bit for each physical page set whenever that page is accessed. OS looks at it, while also periodically resets this bit (a statistical LRU)  A dirty bit is added to the page table to indicate if the page was altered - if yes it needs to be saved before being discarded 20/07/2009Lecture 31_CA&O_Engr. Umbreen Sabir