1. Design of New LLRF System for the SPring-8 Storage Ring T. Ohshima on behalf of RF team of SPring-8-II project LLRF Workshop 2015 @ Shanghai

2. Contents 1.LLRF of SPring-8 storage ring a.Current status & Upgrade plan: SPring-8-II b.Requirements 2.New LLRF control system a.Phase and amplitude control Down-conversion and under-sampling ADC modules under test b.Distribution of reference signal 3.Timing system for injection from SACLA to SR a.RF synchronization between SACLA and SR b.Shot-by-shot parameter switch of SACLA 4.Summary

3. 1. LLRF system of SPring-8 storage ring a. current status SPring-8 – Synchrotron Radiation facility – Circumference ~1.5km – 62 beam lines in operation RF system – 4 RF stations – 8 normal conducting cavities/station – Analog modules with NIM standard – controlled by VME modules 8GeV Storage ring 8GeV Booster synchrotron 1GeV Linac A B C D SACLA 3

4. 1. LLRF system of SPring-8 storage ring b. Upgrade plan: SPring-8-II – user operation since 1997 – upgrade to provide brighter X-rays for users itemSP8SP8IIfactor emittance [nmrad]2.40.15 1/16 beam energy [GeV]86 3/4 energy loss [MeV/turn]105 1/2 energy spread [%]0.10.09~1 RF frequency [MHz]508.58508.76~1 synchrotron frequency [kHz]20.67 1/3 http://rsc.riken.jp/pdf/SPring-8-II.pdf 4

5. – Phase and amplitude control frequency stability < 1E-9 amplitude stability < 1E-3 phase stability < 0.1deg @ 509MHz easy to maintain – Current RF modules of SR: NIM & VME modules designed 20 years ago  difficult to maintain flexibility for various requirements – ex. suppression of coherent oscillation – Injection cope with small aperture of new ring timing jitter < 3ps rms 1. LLRF system of SPring-8 storage ring c. Requirements for RF & Timing system 5

6. 2. Upgrade of LLRF control system a. Phase and amplitude control planning to old analog based module  new digital one 6 anode ps klystron loop (BW~20kHz) cavity loop (BW~60Hz) MTCA.4 (DESY, SLAC,,,)

7. 2. Upgrade of LLRF control system a. Phase and amplitude control 7 Down conversionUnder sampling circuit  use mixer (nonlinearity) O Simple clock jitterO not so sensitiveX very sensitive ADCO high resolution board can be used  need high speed Down conversion and under sampling

8. 2. Upgrade of LLRF control system a. Phase and amplitude control – test module under preparation ～ –80 dBFS @ 60 MHz BW M. Ryoshi et al, Proc. Particle Accelerator Society of Japan, 2015 8 Down conversionUnder sampling ADCStruck: SIS8300LMELOS: new one Input BW800MHz clock125MHz370MHz resolution16bits Noise: –88 dBFS @ 10 kHz BW, 507 MHz input, 156 MSPS

9. – Reduce phase noise important at under sampling detection – BUS topology  STAR increase signal power  S/N – delivery of trigger information 2. Upgrade of LLRF control system b. Distribution of reference signal 9

10. 3. Timing system for injection from SACLA to SR Small aperture of the new ring: – injector booster synchrotron  SACLA SACLA is XFEL facility – 8GeV, 300pC/pulse, 60pps must cope XFEL operation with SR injection We should develop following system i.RF synchronization between SACLA and SR with jitter <3ps At the next pulse after the injection, the rf of SACLA’s cavity should have enough quality for XFEL lasing. ii. Shot-by-shot parameter control of SACLA (bunch length, energy, charge) 10 to SR

11. Rough adjustment – Control timing of master trigger of SACLA – AIMED BUCKET timing (revolution time: 209kHz 4.7us) – Unit step of SACLA timing system :238MHz 4.2ns Fine adjustment – Residual time difference: Control the phase of SACLA’s master oscillator. – FM modulation 3. Timing system for injection from SACLA to SR a. synchronization between SACLA and SR 1/2436 FM in synch unit synch unit SACLA master f sr 509MHz SACLA SR f rev 209kHz Inj Request Bucket No. Master Trigger 60Hz 238MHz injection control process 238, 476, 1428, 2856, 5712MHz 11 AC60Hz 209kHz(SR) SACLA 238MHz master trig inj. req. meas. phase diff calc. FM cntl V apply FM injection

12. FPGA based test sync-unit was built hunt IO5: 2ADC(12bit210Ms/s),2DAC(16bit160Ms/s), Virtex2 DAC1 FM control signal DAC2 phase at injection request FM-off SG1 E8257D SG1 E8257D SG2 E8251A SG2 E8251A FG1 1/400 FG1 1/400 200k ADC clk80M RF 75M+  f FG2 3Hz Oscillo DAC2 DAC1 injection trig 360deg FM-on 3. Timing system for injection from SACLA to SR a. synchronization between SACLA and SR jitter 4.5deg p-p(0.15ns) >> 3ps  need improvement, but principle was proved f rev Inj Request f SR /6 f SACLA /3 Sync Unit ADC1 FM in 7Hz/V 12

13. Current switching operation at SACLA* *T. Hara, et al., FEL2014, Basel,(2014). 3. Timing system for injection from SACLA to SR b. Shot-by-shot parameter switch of SACLA gun 30Hz injector BC TDU SB BC CB BC CB kicker BL2 BL3 15pps 30Hz TDU 30Hz TDU 30Hz TDU 30Hz TDU 15Hz TDU 30Hz TDU change beam energy shot-by-shot master trigger 60pps TDU: Trigger Delay Unit time By 13 gun 60Hz injector BC TDU SB BC CB BC CB kicker BL2 BL3 30pps 60Hz TDU 60Hz TDU 60Hz TDU 60Hz TDU 60Hz TDU 60Hz TDU parameter change shot-by-shot according to beam route master trigger 60pps TDU: Trigger Delay Unit time By For SR injection SR on demand

14. Route information delivery : under investigation 14 acc. unit injection control 509 MHz, 209 kHz Sync Unit injection request 10MHz 238MHz, 5712MHz, … Master Trigger, Beam Route TDU DACADC CPU VME chassis VME bus Master Trigger, Beam Route Trigger Route Information acc. unit 3. Timing system for injection from SACLA to SR b. Shot-by-shot parameter switch of SACLA methodOriginal (add data on master trigger) COTS (ex. MRF event system) Hardware modificationSmallNewly installed Control of DACNot use VME busThrough VME bus InfluenceAll area connected to master trigger line Specific modules to be controlled TDUDACADC CPU VME bus Master Trigger Trigger Route Information EvRcv

15. 4. Summary Upgrade of LLRF control system – Use of MTCA.4 modules compact, enable flexible control heterodyne-type and under sampling-type are under test – Reference distribution topology from bus type to star type to improve phase noise of reference signal Timing system for injection from SACLA to SR – Test sync-unit was built and tested implementation to MTCA.4 is in progress – Parameter change of SACLA shot-by-shot is in design stage 15

16. LLRF Development Schedule Fiscal year201520162017201820192020202X202X +1 design test prototype Digital LLRF synchronization of SACLA with SR installation optical fiber SACLA-SR Tx, Rx prototype final design, fabrication, installation final design, fabrication, installation prototype prototype2 MTCA.4 final design, fabrication, installation timing signal distribution between SACLA and SR pulse-by-pulse parameter control of SACLA design prototype test CDR 2014 Sep. design test final design, fabrication, installation injection to SR from SACLA Dark Time SR shutdown Start SPring-8-II commissioning tentative test@A st 16