1. Overview of microcomputer structure and operation
CPU
I/O
Ports
Memory
ROM RAM
Input Device
Output device
Address Bus
Data Bus

2. Major Parts: CPU Memory Input / Output circuitry Buses: Address bus
Data bus
Control bus

3. Memory:
It stores the binary codes for the sequences of instructions
It stores binary coded data
Example: ROM, RAM, magnetic / optical disks

4. Input / Output:
They are used to take in data from outside world or send data to the outside world
I/O devices are connected with microprocessor through I/O ports
Example: Keyboards, video display terminals, printers, modems

5. Central Processing Unit:
It controls the operation of computer
The CPU fetches binary-coded instructions from memory
Decodes the instructions into a series of simple actions
Carries out these actions in a sequence of steps
Important components: IP, General purpose register and control bus signal generating circuits

6. Address Bus:
It consists of 16, 20, 24, 32 or 36 parallel unidirectional signal lines
On these lines the CPU sends out the address of the memory location or I/O port that is to be written to or read from
The number of locations that the CPU can address is determined by the number of address lines

7. Data Bus:
Data bus consists of 8, 16, 32 parallel bidirectional signal lines
Many devices in the system will have their output connected to data bus, but only one device at a time will have its output enabled

8. Control Bus: The control bus consists of 4 to 10 parallel signal lines
The CPU sends out signals on the control bus to enable the outputs of addressed memory devices or port devices
Example of control signals: Memory read, Memory write

9. How to read a byte of data:
The CPU sends the address of the desired byte on the address bus
Then sends out a memory read signal on the control bus
Memory read signal enables the addressed memory device to output a data word on the data bus
The data word from memory travels along the data bus to the CPU

10. Processor memory Primary or main memory Secondary memory
Memory Organization:
Processor memory
Primary or main memory
Secondary memory

11. Processor Memory:
It refers to the microprocessor registers which are used to hold temporary results when computation is in progress
No speed disparity between these registers and microprocessor because they are fabricated using the same technology
Costly

12. Primary Memory:
This is the storage area in which all programs are executed
The microprocessor can directly access only those items that are stored in primary memory
All programs and data must be within the primary memory prior to execution
Example: ROM, RAM

13. Secondary Memory: It stores program and data in excess of main memory
Microprocessor can not directly execute programs which are stored in secondary memory
In order to execute these programs, the microprocessor must transfer them to its main memory by a system program called operating system
Example: Floppy disk, Hard disk, CD etc.

14. Main memory array design:
Large capacity memory is realized by interconnecting several small sized memory blocks. Three techniques are frequently used.
Linear decoding
Partial decoding
Full decoding

15. Single RAM chip
1K x 8
A9-A0 WE CS
D7 – D0

16. Single RAM chip
Memory is organized as 1024 words with 8 bits / word. Each word has specific address and this is specified on 10 bit address lines A9 – A0
The inputs and outputs are routed through 8 bit bidirectional data lines
The operation of this chip is governed by two control inputs WE’ (write enable) and CS (chip select)

17. L X H Single RAM chip Not select Write Read CS High Impedance Standby
WE’
Mode
D7 – D0
Power L X
Not select
High
Impedance
Standby H
Write
Output Bus
Active
Read
Input Bus

18. Linear decoding:
This technique uses the unused address lines of the microprocessor as chip selects for the memory chip. This method is used for small systems.

19. A A14 A A A A A R/W D7-0
Chip 0
WE’ CS
Chip 1
Chip 2
Chip 3
Chip 4
Chip 5

20. Disadvantage: Wastage of address space Address map is not contiguous
Bus conflict may occur. (If more than one chips are selected at a time)
Foldback (If all unused address lines are not connected as chip select)

22. Partial decoding A11 A10 Device 0 0 0 0 1 1 1 0 2 1 1 3
The memory system is enabled only when the lines A15 through A12 are zero.

23. Cache Memory
The performance of a microprocessor system can be significantly improved by introducing a small, expensive but fast memory between the microprocessor and main memory. This memory is called cache memory.

24. Levels of the Memory Hierarchy
Upper Level
Capacity
Access Time
Cost
Staging
Xfer Unit
faster
CPU Registers
100s Bytes
<10s ns
Registers
Instr. Operands
prog./compiler
1-8 bytes
Cache
K Bytes ns
1-0.1 cents/bit
Cache
cache cntl
8-128 bytes
Blocks
Main Memory
M Bytes
200ns- 500ns
$ cents /bit
Memory OS
512-4K bytes
Pages
Disk
G Bytes, 10 ms (10,000,000 ns)
cents/bit
Disk -5 -6
user/operator
Mbytes
Files
Tape
infinite
sec-min 10
Larger
Tape
Lower Level -8

25. Cache Memories
Cache memories are small, fast SRAM-based memories managed automatically in hardware.
Hold frequently accessed blocks of main memory
CPU looks first for data in L1, then in L2, then in main memory.
Typical bus structure:
CPU chip
register file
ALU L1
cache
cache bus
system bus
memory bus
main
memory
L2 cache
bus interface
I/O
bridge

26. Cache memory
An on chip cache memory was first implemented in Intel microprocessor.
Intel does not have any on-chip cache memory but external cache memory can be interfaced.

27. Locality of Reference
A typical program spends most of its execution times in loops
This means that the address generated by a microprocessor have a tendency to cluster around a small region in the main memory.
This phenomenon is known as locality of reference.

28. Cache Hit
Cache hit means that the reference is found in the cache and the data pertaining to the microprocessor reference is transferred to the microprocessor from cache.

29. Cash Miss
If the reference is not found in the cache, it is called Cash Miss
When there is a cache miss, the main memory is accessed by the microprocessor and the data are transferred to the microprocessor from the main memory.