Presentation is loading. Please wait.

Presentation is loading. Please wait.

Chia-Ho Pan DSPIC/GIEE NTU

Similar presentations


Presentation on theme: "Chia-Ho Pan DSPIC/GIEE NTU"— Presentation transcript:

1 Chia-Ho Pan DSPIC/GIEE NTU 10.24.2008
JPEG XR Encoder Design Chia-Ho Pan DSPIC/GIEE NTU

2 Outline Introduction JPEG XR Standard Encoder Design Concept
Implementation Conclusions

3 Introduction HD Photo/WMP (Window Media Photo) has been announced by Microsoft and the JPEG (Joint Photographic Experts Group) to be under FCD consideration for a JPEG standard, titled JPEG XR. JPEG XR is a royalty-free still image coding standard. The goal of JPEG XR is to support the greatest possible level of image dynamic range, color precision, and keep simple device implementations.

4 Introduction PSNR Comparison with JPEG and JPEG 2000 2175x2800

5 Introduction High Dynamic Range

6 JPEG XR Overall Block Diagram

7 Transform PCT (Photo Core Transform) 2 stages in PCT module
A 16x16 MB is partitioned into 16 4x4 blocks. 2nd stage process the DC values from 1st stage

8 Transform and Quantization
3 bands after PCT transformed: DC band, low pass band (AD), and high pass band (AC)

9 DC Prediction Use the LEFT and TOP block to prediction direction of current block. The AD prediction direction follows DC prediction model.

10 AD/AC Prediction The AC prediction direction is decided after the comparisons between the horizontal and vertical correlated position weighting of AD block.

11 Entropy Coding

12 Pipeline The color conversion, pre-filter and PCT are computing with the 4x4 block style, they are arranged into the same pipeline.

13 Memory Reuse Store last 2 column data for memory reusing in pre-filter, and PCT module to reduce off-chip memory access and execution time.

14 Implementation Synopsys DC and PrimePower results with TSMC .18um 1P6M technology Function Blocks Power(mW) Color conversion 9.4 Pre-filter 82 PCT/Quantization 79.6 Prediction 10 Adaptive Encode 35

15 Conclusions The first JPEG XR chip design for HD resolution is implemented with 25 mm2 area in TSMC 0.18um CMOS 1P6M technology at 100MHz. This powerful and advanced still image compression chip can be used for the next generation HDR display, the digital surveillance, the mobile phone, cameras of all uses, etc. In comparing with existing JPEG2000 encoder chip, the JPEG XR has the higher PSNR performance and lower production cost (including HW area and royalty issue) benefit.


Download ppt "Chia-Ho Pan DSPIC/GIEE NTU"

Similar presentations


Ads by Google