1. Testability of Integrated Circuits Presented by Srujana Aramalla Instructor: Dr.Roman Stemprok

2. Testing Expressed by checking if the outputs of a functional system correspond to the inputs applied to it.

3. Design for Testability (DFT) Ability of simplifying the test of any system

4. Goals of DFT Minimizing the cost of system production Minimizing system test complexity Improving quality Avoiding problems of timing discordance

5. Terminology

6. Practical DFT guidelines 1.Improve controllability and observability

7. 2. Use multiplexers

8. 3. Partition large circuits

9. 4. Divide long counter chains

10. 5. Initialize sequential logic

11. 6. Avoid clock gating

12. 7. Strictly distinguish between signal and clock

13. 8. Separate analog and digital circuits

14. References http://vlsi.wpi.edu/webcourse/toc.html http://vlsi.wpi.edu/webcourse/links.html