1 A quick tutorial on IP Router design Optics and Routing Seminar October 10 th, 2000 Nick McKeown

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Presentation transcript:

1 A quick tutorial on IP Router design Optics and Routing Seminar October 10 th, 2000 Nick McKeown

2 Outline Where IP routers sit in the network What IP routers look like What do IP routers do? Some details: –The internals of a “best-effort” router Lookup, buffering and switching –The internals of a “QoS” router Can optics help?

3 Outline (next time) The way routers are really built. Evolution of their internal workings. What limits their performance. The effect that DWDM is having on switch/router design. The way the network is built today. Discussion: The scope for optics

4 Outline Where IP routers sit in the network What IP routers look like What do IP routers do? Some details: –The internals of a “best-effort” router Lookup, buffering and switching –The internals of a “QoS” router Can optics help?

5 The Internet is a mesh of routers (in theory) The Internet Core IP Core router IP Edge Router

6 What do they look like? Access routers e.g. ISDN, ADSL Core router e.g. OC48c POS Core ATM switch

7 Basic Architectural Components of an IP Router Control Plane Datapath” per-packet processing Switching Forwarding Table Routing Table Routing Protocols

8 Per-packet processing in an IP Router 1. Accept packet arriving on an incoming link. 2. Lookup packet destination address in the forwarding table, to identify outgoing port(s). 3. Manipulate packet header: e.g., decrement TTL, update header checksum. 4. Send packet to the outgoing port(s). 5. Buffer packet in the queue. 6. Transmit packet onto outgoing link.

9 Outline Where IP routers sit in the network What IP routers look like What do IP routers do? Some details: –The internals of a “best-effort” router Lookup, buffering and switching –The internals of a “QoS” router Can optics help?

10 Basic Architectural Components Datapath: per-packet processing 2. Interconnect 3. Egress Forwarding Table Forwarding Decision 1. Ingress Forwarding Table Forwarding Decision Forwarding Table Forwarding Decision

11 Forwarding Engine header payload Packet Router Destination Address Outgoing Port Dest-network Port Forwarding Table Routing Lookup Data Structure / / /

12 The Search Operation is not a Direct Lookup (Incoming port, label) Address Memory Data (Outgoing port, label) IP addresses: 32 bits long  4G entries

13 The Search Operation is also not an Exact Match Search Hashing Balanced binary search trees Exact match search: search for a key in a collection of keys of the same length. Relatively well studied data structures:

/ / / Example Forwarding Table Destination IP PrefixOutgoing Port / / /197 IP prefix: 0-32 bits Prefix length

15 Prefixes can Overlap / / /24 Routing lookup: Find the longest matching prefix (aka the most specific route) among all prefixes that match the destination address / / / Longest matching prefix

Prefixes Prefix Length / / /8 Difficulty of Longest Prefix Match / / /21

17 Lookup Rate Required OC768c OC192c OC48c OC12c B packets (Mpps) Line-rate (Gbps) LineYear DRAM: ns, SRAM: 5-10 ns Mpps  33 ns

18 Size of the Forwarding Table Source: Year Number of Prefixes 10,000/year

19 Basic Architectural Components Datapath: per-packet processing 2. Interconnect 3. Egress Forwarding Table Forwarding Decision 1. Ingress Forwarding Table Forwarding Decision Forwarding Table Forwarding Decision

20 Interconnects Two basic techniques Input Queueing Output Queueing Usually a non-blocking switch fabric (e.g. crossbar) Usually a fast bus

21 Interconnects Output Queueing Individual Output QueuesCentralized Shared Memory Memory b/w = (N+1).R 1 2 N Memory b/w = 2N.R 1 2 N

22 Output 2 Output N Interconnects Centralized Shared Memory Large, single dynamically allocated memory buffer: N writes per “cell” time N reads per “cell” time. Limited by memory bandwidth. Input 1 Output 1 Input N Input 2 Numerous work has proven and made possible: –Fairness –Delay Guarantees –Delay Variation Control –Loss Guarantees –Statistical Guarantees

23 Output Queueing How fast can we make centralized shared memory? Shared Memory 200 byte bus 5ns SRAM 1 2 N 5ns per memory operation Two memory operations per packet Therefore, up to 160Gb/s In practice, closer to 80Gb/s

24 Interconnects Input Queueing with Crossbar configuration Data In Data Out Arbiter Memory b/w = 2R

25 Input Queueing Head of Line Blocking Delay Load 58.6% 100%

26 Head of Line Blocking

27 Input Queueing Virtual output queues

28 Input Queueing Virtual Output Queues Delay Load 100%

29 Input Queueing Virtual output queues Arbiter Memory b/w = 2R Complex!

30 Other Non-Blocking Fabrics Clos Network

31 Other Non-Blocking Fabrics Clos Network Expansion factor required = 2-1/N

32 Other Non-Blocking Fabrics Self-Routing Networks

33 Other Non-Blocking Fabrics Self-Routing Networks Bitonic SorterSelf-Routing Network The Non-blocking Batcher Banyan Network Fabric can be used as scheduler. Batcher-Banyan network is blocking for multicast.

34 Outline Where IP routers sit in the network What IP routers look like What do IP routers do? Some details: –The internals of a “best-effort” router Lookup, buffering and switching –The internals of a “QoS” router Can optics help?

35 Basic Architectural Components Output Scheduling Control Plane Datapath” per-packet processing Switching Forwarding Table Reservation Admission Control Routing Table Routing Protocols Policing & Access Control Packet Classification IngressEgressInterconnect

36 Basic Architectural Components Datapath: per-packet processing 2. Interconnect 3. Egress Forwarding Table Classifier Table Policing & Access Control Forwarding Decision 1. Ingress Forwarding Table Classifier Table Policing & Access Control Forwarding Decision Forwarding Table Classifier Table Policing & Access Control Forwarding Decision Limitation: Memory b/w Limitation: Interconnect b/w Power & Arbitration Limitation: Memory b/w

37 Outline Where IP routers sit in the network What IP routers look like What do IP routers do? Some details: –The internals of a “best-effort” router Lookup, buffering and switching –The internals of a “QoS” router Can optics help?

38 Can optics help? Cynical view: 1.A packet switch (e.g. an IP router) must have buffering. 2.Optical buffering is not feasible. 3.Therefore, optical routers are not feasible. 4.Hence, “optical switches” are circuit switches (e.g. TDM, space or Lambda switches).

39 Can optics help? Open-minded view: Optics seem ill-suited to processing intensive functions, or where random access memory is required. Optics seems well-suited to bufferless, reconfigurable datapaths.

40 Can optics help? Physical Layer Framing & Maintenance Packet Processing Buffer Mgmt & Scheduling Buffer Mgmt & Scheduling Buffer & State Memory Buffer & State Memory Typical IP Router Linecard OC192c linecard: ~10-30M gates ~2Gbits of memory ~2 square feet >$10k cost Lookup Tables Backplane Buffered or Bufferless Fabric Arbitration

41 Can optics help? Linecard? –The linecard is processing & memory intensive. Interconnect? –Arbitration is very processing intensive. –The fabric can be a bufferless datapath… –How fast can an optical datapath be reconfigured?

42 Outline for next time… The way IP routers are really built. Evolution of their internal workings. What limits their performance. The effect that DWDM is having on switch/router design. The way the network is built today. Discussion: The scope for optics