Multiple File Compilation and linking By Bhumik Sapara

What is it and Why it is needed ? Most of the time, full programs are not contained in a single file. Many small programs are easy to write in a single file, but larger programs involve separate files containing different modules. As our programs become larger, and as we start to deal with other people's code (e.g. other C libraries) we will have to deal with code that resides in multiple files. we may build up our own library of C functions and data structures, that we can re-use in our own scientific programming and data analysis.

Compilation Compilation is processing of source code files (.c,.cc, or.cpp) and the creation of an 'object' file. The "compilation" of a program actually consists of two major stages. Compile Stage Linking Stage

Compile stage Syntax checked for correctness Variables and function calls checked to insure that correct declarations were made and that they match. (Note:& The compiler doesn't need to match function definitions to their calls at this point). Translation into object code. Object code is just a translation of your code file -- it is not an executable program, at this point.

Linking stage Links the object code into an executable program. May involve one or more object code files The linking stage is the time when function calls are matched up with their definitions, and the compiler checks to make sure it has one, and only one, definition for every function that is called. The end result of linking is usually an executable program.

Object Files Object files (Windows.obj, Linux.o) are an intermediate form of machine code that is not executable These are inputs to a linker which links multiple modules into one executable program Object Files contain unresolved references to procedures or data located in other modules When developing a program as a set of independent modules, all offsets in a segment are relative to the segment registers of that module When several modules are combined the offsets have to be adjusted whenever segments are shared

Language Independence Object files are where the language disappears The basic idea of object files is to allow programmers to write and assemble (or compile) individual pieces of programs and then to link them together to make the final program. For most languages you can work without ever being aware of the existence or presence of object files When building mixed-language programs the each language is used to create one or more object files which are then linked into a single executable

How to do that ? If you have several files with source code ".c", you can compile them together, or you can do it in intermediate steps by creating first the object files ".o", and then linking them together to produce the final executable. Compile together gcc source_1.c source_2.c source_3.c -o final Creating first the object files, and then linking them gcc -c source_1.c gcc -c source_2.c gcc -c source_3.c gcc source_1.o source_2.o source_3.o -o final

Example Hello.c int main(void) { hello(); return 0; } Hello2.c #include void hello(void) { printf("Hello, World!\n"); } The first way to do this is: gcc hello.c hello2.c This will compile the two files into one executable. The second way to do this is to add this to the beginning of hello.c and compile: #include "hello2.c“ This tells the compiler to include hello2.c in the compilation automatically. Here's the third way to do this: gcc -c hello.c gcc -c hello2.c gcc hello.o hello2.o First, you tell gcc to compile hello.c and hello2.c, but you do not link them. This produces the object files hello.o and hello2.o. You can easily link the object files together with the last command.

Make tool Since it is tedious to recompile pieces of a program when something changes, people often use the make utility instead. Make is commonly used to compile C programs that are made up of several files. When you run the make utility, it examines the modification times of files and determines what needs to be regenerated. Files that are older than the files they depend on must be regenerated. A simple Makefile for our previous example look like this: hello: hello.c hello2.c gcc -o hello hello.c hello2.c

How makefile works For simple make files, there will be at least 2 parts: A set of variables, which will specify things like the C compiler/linker to use, flags for the compiler, etc. A set of targets, i.e., files that have to be generated. In general, the form for setting a variable is: VARNAME = value For each target, there are typically 1 or 2 lines in a make file. Those lines specify: its dependencies (easy to determine from a dependency chart) command to generate the target (easy to determine from knowledge of separate compilation).

How makefile works For a target's dependency line, the target file name should be listed, followed by a colon (:) and the files it depends on: hello: hello.o hello2.o there should be a command that generates the target: $(CC) $(CFLAGS) -o hello hello.o hello2.o where CC = gcc and CFFLAGS are flags used

Makefile Example # Sample makefile for fraction class frac: main.o frac.o gcc -o frac main.o frac.o main.o: main.cpp frac.h gcc -c main.cpp frac.o: frac.cpp frac.h gcc -c frac.cpp The first section specifies "frac" as the target, and it depends on main.o and frac.o. The command is the linking command for linking these two object code files together into a target executable called "frac“ The next section specifies how to built the target "main.o". This depends on main.cpp and frac.h. Similarly, the next section does the same for the target "frac.o“ When the make command is used by itself, the utility attempts to make the FIRST target listed in the makefile

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