1 The Silicon TPC System EUDET Extended SC meeting 1 September 2008 Jan Timmermans NIKHEF.

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Presentation transcript:

1 The Silicon TPC System EUDET Extended SC meeting 1 September 2008 Jan Timmermans NIKHEF

2 JRA2 activity/task Silicon TPC readout (“SITPC”) - development MediPix  TimePix chip - development diagnostic endplate module incl. DAQ Purpose: a SiTPC based monitoring system Partners: ALU Freiburg, Bonn, CEA Saclay, CERN, NIKHEF

3 Develop the Timepix chip that allows to measure the 3 rd coordinate (drift time) Implementation of Timepix together with GEM and Micromegas/Ingrid into diagnostic endplate system (in progress) Performance measurements in test infrastructure at DESY (in preparation) Develop simulation framework (in progress) Develop DAQ system and integrate in overall DAQ of EUDET infrastructure (in progress) SITPC Tasks:

4 Timepix 1 st run 2006: 6 (Eudet) wafers +14 (“private” + Medipix coll.) All wafers probed; avg. yield ~73% 2 nd run 2008: 38 (Eudet) wafers +34 (“private” + Medipix coll.) Sofar 2 wafers probed; similar yield

5 Freiburg activities

6 Measure detection effieciency for single electron clsuters Investigate influence from number of primary electrons on single point resolution. Possibly study ion backdrift proberties 6 8cm N 2 -laser Installation of a laser test bench for measurements with single (primary) electrons. Detector with metallized drift cathode. From this laser releases single photo- electrons  creation of well defined and seperated Freiburg

7 7 Work on technologies for post processing chips Optimization of readout granularity originally processed Pixel size 110x110µm 2 Pixel size 55x55µm 2 Fe 55 -Cluster are partly filled. Possible reason for filled clusters: Insufficient thickness of passivation Crosstalk on chip level

88 100% 10%  27 V Clusters not filledClusters filled  27V correspond to a factor 5 in gain. Ongoing investigation of the cross talk behavior

9 Solution  use network tools 9 Program a plug-in that uses standard network connections and TCP/IP, so that Pixelman software can be operated by a Linux DAQ-system, e.g. EUDAQ Produce Linux based DAQ steering (basic) Pixelman functions

10 (EUDET) DAQ TCP/IP socket plugin TimePix Pixelman As an option Pixelman can send commands to the DAQ via the socket plug-in software interface A socket is a software interface between two programs for interprocess communication. The programs can be running on the same machine or on different machines connected via network.

11 Bonn activities

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17 Saclay activities

18 Deliverable 1: single-chip diagnostic tool Must include a field cage Micromegas mesh with 55 micron pitch, to avoid Moiré effect Special frame to handle the mesh (in pick) 2 windows (beta on the side, gamma on the top). Also possible to shoot a photon beam for polarimetry applications. No magnetic component.

19 6 cm TimePix+Micromegas detector

20 Next Deliverable: 8-chip endplate panel infrastructure 8 chips is the maximum that can be handled by a MUROS readout card. The 8 chips must be power-supplied and the readout must be daisy-chained There must be a possibility to bypass any broken chip (but only one at a time) Chips must be equipped with an InGrid

21 To be inserted in place of a standard panel in the LC-TPC Large Prototype

22 Connector card

23

24 Recent developments and plans This infrastructure has been delivered in March Since then, it was equipped with 8 TimePix chips (600 wire bondings) Not enough power from MUROS: use external supply Mistake in the design found; solved by cutting some tracks on the PCB. Now a pure serial readout is used. Still not possible to read all 8 chips: wiring mistake will be corrected. This should solve the problem. After test with this PCB, will consider making a new PCB with 12 layers instead of 6; should contain all connections in a 30x60 mm rectangle. At the same time we can correct the present version for known mistakes.

25 NIKHEF activities 1T magnet data and CERN PS data analysis Technology development: (together with Univ. Twente) –Ingrid, “GEM”grid, Twingrid –Protection layers: aSi:H, Si 3 N 4 –Design larger chip-arrays

26 Cosmic tracks traversing ~ 30 mm drift space in Ar-CF4-iC4H10 (95/3/2%) 0 T 1 T “large” diffusion “little” diffusion

27 distance to track 22 August 2008 distance (pixels)sqrt(z) (counts) σ (arbitrary units) CERN PS testbeam data (B=0)

28 Full post-processing of a TimePix · Timepix chip + SiProt + Ingrid: IMT Neuchatel: 15 or 20 μm highly resistive aSi:H protection layer Timepix chip: 256x256 pixels pixel: 55x55 μm 2 active surface: 14x14 mm 2 MESA+: Ingrid

29 “GEM”grids Twingrid (under test)

30 Quad boards A square of 4 Timepix chips on a pcb. Solved some power problems. Set up works. Awaiting chips with Si(N)Prot and InGrid from Twente Potential deliverable for EUDET.

31 Work in progress (Post) processing in Twente. –Both SiNProt and InGrid can be applied. –Chip squares of 3X3 Timepix chips instead of individual chips. –Search for high res InGrids. (Si 3 N 4 ) –Ageing test chips. –Discharge test chips. Quad in testbeams. Design of an 8X8 array. –Input from the RELAXED project. –Composed of quads. –Mechanics are being made right now. –Readout electronics in prototype stage.

32 Sofar mostly single-chip systems used Soon (Eudet deliverable) small multi-chip systems operational: –Bonn: two 4-chip boards  on endplate module –Saclay: one 8-chip board  on endplate module –NIKHEF: 4-chip board, fitting single-chip detector mechanics and drifter (could become endplate module) Later (~3/2009): aim for a 64-chip system (bottleneck could be production of sufficient # Ingrids; IZM Berlin interested) SiTPC Summary-1

33 SiTPC Summary-2 A lot of progress made in last ‘year’; not mentioned many details on track resolution studies and on signal development Part of the technology is ready: –Very good energy resolution for Ingrid devices –Ion backflow at the few per-mil level at high field ratio Discharge protection seems working for Ingrid (and Micromegas) devices under “normal” conditions Robust operation with GEM devices (without protection) Next: Build larger multi-chip detector systems with fast readout