EEL 3801 Part V Conditional Processing

This section explains how to implement conditional processing in Assembly Language for the 8086/8088 processors. While loops are explicitly implemented in Assembly, conditional structures are not so. They must be implemented by using some rather complex instructions.

BOOLEAN and COMPARISON Instructions Boolean logic has long been a part of computers. In fact, these instructions form the basis of processor instructions. All instructions to be discussed affect several of the flags, such as the Zero Flag, the Carry Flag and the Sign Flag.

BOOLEAN and COMPARISON Instructions (cont.) Other less important flags are also affected, but these are the major ones. –Zero Flag (ZF): set when result of operation = 0. –Carry Flag (CF): set when result of unsigned addition is too large for destination, or when a subtraction requires a borrow (result is < 0).

BOOLEAN and COMPARISON Instructions (cont.) –Sign Flag (SF): set when the high bit of a signed number operand is set, indicating a negative number. –Overflow Flag (OF): set when the result of a signed arithmetic operation is too large for destination operand (out of range).

The AND Instruction Performs a boolean AND operation on two 8-bit or 16-bit binary numbers. Places the result in the destination operand. Format is: AND destination,source

The AND Instruction (cont.) Only one of the operands may be a memory operand, –they must both be of the same size. This instruction, as well as all other boolean operations, works on a bit-by-bit basis, – comparing the bits in the respective positions in the destination and the source.

The AND Instruction (cont.) If the two corresponding bits are both set, then the corresponding bit in the destination is set (= 1). Otherwise, it is cleared (= 0). Applications: Bit masking (clearing certain bits). See page 181 of new book for specific examples.

The OR Instruction Performs a boolean OR operation between two 8- or 16-bit binary numbers. –If corresponding bits are both 0, then resulting bit will be 0; –Otherwise, resulting bit is set to 1. Its format is: OR destination,source

The OR Instruction Only one of the operands may be a memory operand, –they must both be of the same size. Applications: Checking the sign or value by looking at the flags Convert a binary digit to the ASCII equivalent Setting status bit values

The XOR Instruction Performs the EXCLUSIVE OR operation. Same basic idea applies as the other two instructions, –except that the resulting bit is 1 if the source and destination are different, 0 if they are the same. The format is: XOR destination,source

The XOR Instruction (cont.) Applications: Reversing bits Encrypting information (applying it twice will return the original bit).

The NOT Instruction Reverses the value of each bit. Same as the negation operation in boolean algebra. This amounts to computing the one’s complement of the operand. The format is NOT destination

The NEG Instruction Reverses the sign of a signed number. This is done by computing its two’s complement (take the one’s complement and add 1b). The format is NEG destination

The NEG Instruction (cont.) Check the Overflow Flag after this operation to ensure that the resulting operand is valid. For example, if we NEG –128, the result is –128, which is invalid. The OF should be set when this happens, indicating that this is not a valid operation.

The TEST Instruction Performs an implied AND operation that does not change the destination, but affects the flags as does the AND. The format is: TEST destination,source

The TEST Instruction (cont.) The important thing is that if any of the matching bit positions are set in both operands, the Zero Flag is cleared. Applications: –Useful when trying to determine whether any individual bits in an operand are set.

The TEST Instruction (cont.) To implement the application: –Put an operand with the bit set on the bit needed to be ascertained, and all others cleared. If ZF = 0, we know that that bit (or bits) are set. If ZF = 1, then it/they are not set.

The CMP Instruction Offers a way to compare 8- or 16-bit operands. The result can be read from the Flag register. The format: CMP destination,source

The CMP Instruction (cont.) This instruction subtracts one operand from the other (destination – source). However, neither operand is actually modified. If destination > source, CF = 0, ZF = 0 If destination = source, ZF=1 If destination < source, CF = 1.(produces a borrow) This is the basis of conditional jumps.

Example mov al,5 cmp al,10; 5-10<0 sets carry flag (CF=1) mov ax,1000 mov cx,1000 cmp cx,ax; 1000 – 1000 = 0,  ZF=1 mov si,105 cmp si,0; >0, CF=0, ZF=0

Conditional Jumps There are no assembly language equivalents to the high level language conditional structures. However, the same thing can be concocted by combining several of the instructions provided in the instruction set of the 8086/8088 processor. This is the topic in this section.

Conditional Jumps (cont.) This can be done with 2 groups of instructions: Comparison and arithmetic operations (instructions) in which certain flags are set. Conditional jump instructions in which the CPU takes action according to the values of the flags involved.

Conditional Jumps (cont.) There are several such conditional jump instructions. They all have the format: J cond destination Where the condition is different depending on the instruction. The destination address must be between – 128 and 127 bytes away from instruction.

Conditional Jumps (cont.) There are several such conditions –pg. 194 (new book) for unsigned comparisons, –pg. 193 (new book) for signed comparisons. They all depend on one or more flags in the Flag Register, but mainly on ZF, CF, OF, SF, and PF (parity flag). One of them (JCXZ) makes use of the CX register.

Examples mov ax,var1 mov bx,var2 cmp ax,bx je equal not_equal: jmp exit equal: exit:

Examples (cont.) If var1 = var2, then statements 3 and 4 will be executed. If var1 < var2, then statements 1 and 2 will be executed. If var1 > var2, then statements 1 and 2 will be executed.

Conditional Loops The same thing applies to conditional loops. They now not only depend on the non-zero value of CX register, but also on some other condition, such as a flag register. Only when these 2 conditions are satisfied will the instructions loop around again.

The LOOPZ Instruction Continues to loop as long as CX > 0, and ZF = 1. The format is as follows: LOOPZ destination Where the destination must be within –128 and 127 bytes from the LOOPZ instruction.

Example - Scanning an Array Scan an array of integer values until a non- zero is found; then stop. mov bx,offset intarray ; moves array address sub bx,2 ; back up one word mov cx,100 ; repeat 100 times next: add bx,2 ; move pointer up one cmp word ptr [bx],0 ; check if zero loopz next ; if so, go to next

The LOOPNZ Instruction This is the opposite of the LOOPZ instruction. This one continues to loop as long as CX>0 and ZF=0. It has the same identical syntax as LOOPZ, with the same conditions of proximity for the destination.

Example - Scanning an Array Scan an array of integers for the first positive number. array db -3,-6,-1,-10,10,30,40,4 array_len equ $-array. mov si,offset array-1 mov cx,array_len next: inc si test byte ptr [si],80h; b loopnz next

High Level Logic Structures There are other logic structures in high level languages that may be desirable to duplicate in assembly. These are discussed here briefly.

The IF Statement This can be easily done with the instructions that have already been described. For example, to execute several instructions if one operand equals the other, see the code in the following slide:

The IF Statement (cont.) cmp op1,op2; sets flags je next_label jmp endif next_label: end_if:.

The IF Statement (cont.) Can also be combined with the OR operator (not instruction): cmp al,op1 jgL1 cmp al,op2 jge L1 cmp al,op3 je L1 cmp al,op4 jl L1 jmpL2 L1: L2:

The While Structure Tests a condition before performing a block of instructions. Repeats the instructions as long as the statement is true. This can be easily represented as follows:

The While Structure (cont.) do_while: cmp op1,op2 jnl enddo jmp do_while enddo:

The Repeat-Until Structure You get the picture.

The CASE Structure Same as the switch structure in C, where depending on what the value of a variable is, the control branches to several different places. Same idea as the others above. See page 209 (new book).

Shift and Rotate Instructions These instructions allow for messing with the bits. Interestingly enough, C allows such bit- level manipulations. Can be used to do high-speed multiplication, where you multiply the operand by 2 to the power of how many times ever you shift to the left.

The Shift Left Instruction (SHL) The SHL instruction shifts each bit in the destination operand by 1 position to the left. The high bit is moved to the Carry Flag, the low bit is cleared (= 0), and the old bit on the Carry Flag is lost. Can also shift left a specific number of positions. The format is: SHL destination,1 or SHL destination,CL

The Shift Left Instruction (SHL) (cont.) If CL is used as the source operand, then the value of CL represents how many times to shift left. The value can be from 0 to 255. –CL is not changed. –Both register and memory operands may be used.

SHL - Example shl bl,1 shl wordval,1 shl byte ptr[si],1 mov cl,4 shl al,cl

The Shift Left Instruction (SHL) (cont.) Can be used to do high-speed multiplication, –you multiply the operand by 2 to the power of how many times ever you shift to the left.

The Shift Right Instruction (SHR) Same as SHL, except that it shifts right instead of left. SHR destination,1 or SHR destination,CL Where CL is the number of shifts to be made. Can be used to divide by a power of 2.

The SAL and SAR Instructions SAL stands for Shift Arithmetic Left SAR stands for Shift Arithmetic Right Same as SHL and SHR except these are specifically for signed operands. SAL is in truth identical to SHL and is included only for the sake of completeness. SAR shifts each bit to the right, but makes a copy of the sign bit.

The SAL and SAR Instructions (cont.) It copies the lowest bit of the destination operand into the Carry Flag Shifts the operand right 1 bit position Duplicates the original sign bit.

The Rotate Left (ROL) Instruction Moves each bit to the left –but the highest bit is copied into the Carry Flag and to the lowest bit. Can be used to exchange the high and low halves of an operand. Has the same format as the Shift Instructions: ROL destination,1 or ROL destination,cl

The Rotate Right (ROR) Instruction Same as ROL except it rotates to the right. The lowest bit is copied into: the Carry Flag. and the highest bit. The format is: ROR destination,1 or ROR destination,cl

The RCL and RCR Instructions Self-explanatory based on the above.

Example Can be used for multiplication, even if neither operand is a power of 2. This can be done if the operand can be obtained by adding two numbers that are a power of 2. For example if we multiply any number (contained in a variable called “intval”) by 36, we could multiply it by (32 +4), both of which are powers of 2:

Example mov bx,intval; move integer to BX mov cl,5; multiply x 2 5 = 32 shl bx,cl; shift left 5 times mov product,bx; store result mov bx,intval; do it again shl bx,1; mult by 2 shl bx,1; mult by 2 again add product,bx; add results

Multiple Addition and Subtraction The ADD and SUB instructions allow for adding and subtracting only two operands. This can be rather limiting. Much better can be done with an instruction that can carry out a sum or subtraction of several operands.

The ADC Instruction: The Add with Carry Instruction allows for addition and subtraction of multiple operands. It permits both the source operand and the carry Flag to be added to the destination.