1 System-Level Vulnerability Estimation for Data Caches

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Goal: Improving accuracy of previously suggested vulnerability factor Motivation: Read frequency and components error masking (previously ignored, significantly affect the accuracy ) Our Solution: SVF : System-level vulnerability factor Key Result Vulnerability estimation accuracy in cache (  40%) 1010 & 0011 = 0010 This Work: Accurate Vulnerability Modeling for Cache Memory & 0011 =

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Why Reliability Analysis for Cache ? Error rate is expected to increase in cache o 92% of system reboots are initiated by soft-error occurring in cache [Shazli08] o Soft-error sources: α particles and neutrons strike Reliability aware design is necessary o Having cost-effective design Accurate vulnerability analysis Need early design phase vulnerability estimation 3

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Failure in Time (Our focus) 4

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Life Time Analysis Typical cache block access Vul Blk = (t 2 -t 1 ) AVF Blk = (t 2 -t 1 )/t 3 AVF cache =  AVF blk_i /number_blks Vulnerable FillReadEvict Time t1t1 t2t2 t3t3 5 Blk

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Life Time Analysis Advantages: o Early design vulnerability estimation o Less detailed model and single pass simulation Disadvantages: o Overestimates AVF Up to 260% discrepancy with Fault injection [Wang07] o Overlooking read frequency & error masking 6

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Read Frequency Vul Blk1 = t 4 - t 1 Vul Blk1 = (t 2 -t 1 ) + (t 3 -t 2 ) + (t 4 -t 3 )= t 4 - t 1 AVF Blk1 = AVF Blk2 = (t 4 -t 1 )/t 5 7 Vul. Fill Read 1 Evict t1t1 t2t2 t3t3 Time t4t4 t5t5 Blk 1 Vul. Fill Read 1 Evict t1t1 t2t2 t3t3 Time Vul. Read 2 Read 3 Blk 2 t4t4 t5t5

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Error Masking Lifetime analysis: Vul Blk = (t 2 -t 1 ) Accurate analysis: Vul Blk = 0 P( Masking )=1 Blk i 8

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Our Solution: SVF SVF considers read frequency & error masking SVF: Percentage of errors that occur in a component and propagate to system outputs SVF uses the following: o P(masking) = IOM o P(propagation) = 1 – IOM 9

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide SVF Analysis Fill Read 1 Read 2 Time t0t0 t1t1 t2t2 t3t3 Evict 10 Byte i th

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Detailed SV Analysis Erroneous data in cache result failure: o Written-back to main memory o Read by CPU SV different cases : o Case 1 : Clean byte o Case 2 : Dirty byte without write o Case 3 : Dirty byte with write 11

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide SV Scenario on Clean Byte Case 1 : Clean byte 12 Fill Read 1 Read 2 Time t0t0 t1t1 t2t2 tntn Evict Byte i th... Read n t ev

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide SV Different Scenarios Case 2 : Dirty byte without write 13 Fill Read 1 Read 2 t0t0 t1t1 t2t2 tntn Write-Back Byte i th... Read n t write-back

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide SV different scenarios Case 3: Dirty block with write 14 Fill Read 1 Read 2 t0t0 tr 1 tr 2 tw k Write-Back Byte i th... write k t write-back write 1 tw 1

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Methodology sim-alpha simulator o F.I running in functional simulation mode o SVF calculation running in detailed simulation mode SPEC2000 benchmarks Processor configuration 15 FUs : 4 iALUs, 4 iMultiplier/divider, 1 fpALUs, 1 fpMultiplier/divider LSQ / RUU / ROB size : 32 / 32 / 32 Instructions DL1/IL1 : 4-way, 64KB, 3 cycle / 2-way, 64KB, 1 cycle 64 B cache line cycle Memory access

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide IOM cpu Estimation Fault injection on load instructions o F.I= Fault injection point Observe propagation on store instructions o O.P= Observation point IOM = #Correct /# Total F.IO.P 16

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide IOM cpu Sensitivity: Number of Runs 17 IOM

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Vulnerability Factors for Write-back Data Cache 18 VF

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Vulnerability Factors for Write-Through Data Cache 19 VF

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide SVF cache Accuracy Improvement vs AVF 20 Accuracy

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Summary System-level vulnerability modeling technique o Investigates read frequency & erorr masking Our result o Large AVF-SVF discrepancy in storage components with long storing times. WT cache – 40% improved accuracy 21

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Questions 22

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Backup Slide 1 F.I Simulation Time for IOM cpu experiments 23

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Backup Slide 2 Relax IOM probability for each read access to IOM for total reads Reference model is AVF Validation model based on Fault injection is under development TVF cache is 50% TVF = Timing Vulnerability Factor o TVF latch = %50 o TVF SRAM =%100 24

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Backup slide 3 Fill Read 1 Read 2 Read 3 Time t0t0 t1t1 t2t2 t3t3 t4t4 Evict 25

PRDC 2010, Dec. 15 System-Level Vulnerability Estimation for Data Caches Slide Backup Slide 4 IOM IU 26