Combinational Logic Part 2: Karnaugh maps (quick).

Slides:



Advertisements
Similar presentations
CS 121 Digital Logic Design
Advertisements

KU College of Engineering Elec 204: Digital Systems Design
Prof. Sin-Min Lee Department of Computer Science
Gate-Level Minimization
Overview Part 1 – Gate Circuits and Boolean Equations
K-Map Simplification COE 202 Digital Logic Design Dr. Aiman El-Maleh
Based on slides by: Charles Kime & Thomas Kaminski © 2004 Pearson Education, Inc. ECE/CS 352: Digital System Fundamentals Lecture 8 – Systematic Simplification.
ECE 3110: Introduction to Digital Systems Simplifying Sum of Products using Karnaugh Maps.
Chapter 3 Simplification of Switching Functions. Karnaugh Maps (K-Map) A K-Map is a graphical representation of a logic function’s truth table.
KARNAUGH MAP Introduction Strategy for Minimization Minimization of Product-of-Sums Forms Minimization of More Complex Expressions Don't care Terms 1.
Gate-level Minimization
Gate-Level Minimization. Digital Circuits The Map Method The complexity of the digital logic gates the complexity of the algebraic expression.
Chapter 3 Simplification of Switching Functions
Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal approach to simplification that is.
Charles Kime & Thomas Kaminski © 2004 Pearson Education, Inc. Terms of Use (Hyperlinks are active in View Show mode) Terms of Use Chapter 2 – Combinational.
CSCE 211: Digital Logic Design Chin-Tser Huang University of South Carolina.
Give qualifications of instructors: DAP
Gate Logic: Two Level Canonical Forms
Contemporary Logic Design Two-Level Logic © R.H. Katz Transparency No. 4-1 Chapter #2: Two-Level Combinational Logic Section 2.3, Switches and Tools.
Gate-Level Minimization1 DIGITAL LOGIC DESIGN by Dr. Fenghui Yao Tennessee State University Department of Computer Science Nashville, TN.
Computer Engineering (Logic Circuits) (Karnaugh Map)
SYEN 3330 Digital Systems Jung H. Kim Chapter SYEN 3330 Digital Systems Chapter 2 – Part 5.
EECC341 - Shaaban #1 Lec # 7 Winter Combinational Circuit Minimization Canonical sum and product logic expressions do not provide a circuit.
Overview Part 2 – Circuit Optimization 2-4 Two-Level Optimization
1 Simplification of Boolean Functions:  An implementation of a Boolean Function requires the use of logic gates.  A smaller number of gates, with each.
1 Chapter 5 Karnaugh Maps Mei Yang ECG Logic Design 1.
Chapter 3 Simplification of Switching Functions. Simplification Goals Goal -- minimize the cost of realizing a switching function Cost measures and other.
Department of Computer Engineering
CHAPTER 1 INTRODUCTION TO DIGITAL LOGIC. K-Map (1)  Karnaugh Mapping is used to minimize the number of logic gates that are required in a digital circuit.
Charles Kime & Thomas Kaminski © 2008 Pearson Education, Inc. (Hyperlinks are active in View Show mode) Chapter 2 – Combinational Logic Circuits Part 2.
D IGITAL L OGIC D ESIGN I G ATE -L EVEL M INIMIZATION.
Optimization Algorithm
Charles Kime & Thomas Kaminski © 2008 Pearson Education, Inc. Circuit Optimization Logic and Computer Design Fundamentals.
ECE 2110: Introduction to Digital Systems PoS minimization Don’t care conditions.
Circuit Minimization. It is often uneconomical to realize a logic directly from the first logic expression that pops into your head. Canonical sum and.
Charles Kime & Thomas Kaminski © 2008 Pearson Education, Inc. (Hyperlinks are active in View Show mode) Chapter 2 – Combinational Logic Circuits Part 2.
PRASAD A. PAWASKAR SPN. NO DETE 2 SEMESTER lec1-11.
Charles Kime & Thomas Kaminski © 2008 Pearson Education, Inc. (Hyperlinks are active in View Show mode) Chapter 2 – Combinational Logic Circuits Part 2.
Gate-Level Minimization
Gate-level Minimization
Chapter 2 Two- Level Combinational Logic. Chapter Overview Logic Functions and Switches Not, AND, OR, NAND, NOR, XOR, XNOR Gate Logic Laws and Theorems.
Computer Engineering (Logic Circuits) (Karnaugh Map)
Chapter3: Gate-Level Minimization Part 1 Origionally By Reham S. Al-Majed Imam Muhammad Bin Saud University.
07 KM Page 1 ECEn/CS 224 Karnaugh Maps. 07 KM Page 2 ECEn/CS 224 What are Karnaugh Maps? A simpler way to handle most (but not all) jobs of manipulating.
CHAPTER 3: PRINCIPLES OF COMBINATIONAL LOGIC
CS1Q Computer Systems Lecture 7
Ahmad Almulhem, KFUPM 2010 COE 202: Digital Logic Design Combinational Logic Part 3 Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:
ENG241 Digital Design Week #2 Combinational Logic Circuits.
LOGIC CIRCUITLOGIC CIRCUIT. Goal To understand how digital a computer can work, at the lowest level. To understand what is possible and the limitations.
CS151 Introduction to Digital Design Chapter Map Simplification.
June 12, 2002© Howard Huang1 Karnaugh maps Last time we saw applications of Boolean logic to circuit design. – The basic Boolean operations are.
BOOLEAN ALGEBRA AND LOGIC SIMPLIFICATION
CHAPTER 1 INTRODUCTION TO DIGITAL LOGIC
Karnaugh Maps (K-Map) A K-Map is a graphical representation of a logic function’s truth table.
1 Example: Groupings on 3-Variable K-Maps BC F(A,B,C) = A ’ B ’ A BC F(A,B,C) = B ’ A
ECE/CS 352 Digital System Fundamentals1 ECE/CS 352 Digital Systems Fundamentals Spring 2001 Chapter 2 – Part 5 Tom Kaminski & Charles R. Kime.
1 Gate Level Minimization EE 208 – Logic Design Chapter 3 Sohaib Majzoub.
Digital Logic (Karnaugh Map). Karnaugh Maps Karnaugh maps (K-maps) are graphical representations of boolean functions. One map cell corresponds to a row.
Karnaugh Maps (K maps).
Based on slides by:Charles Kime & Thomas Kaminski © 2004 Pearson Education, Inc. ECE/CS 352: Digital System Fundamentals Lecture 7 – Karnaugh Maps.
Chapter 3 Simplification of Switching Functions. Simplification Goals Goal -- minimize the cost of realizing a switching function Cost measures and other.
Charles Kime & Thomas Kaminski © 2008 Pearson Education, Inc. (Hyperlinks are active in View Show mode) Chapter 2 – Combinational Logic Circuits Part 2.
CHAPTER 3 Simplification of Boolean Functions
ECE 2110: Introduction to Digital Systems
CHAPTER 5 KARNAUGH MAPS 5.1 Minimum Forms of Switching Functions
Optimization Algorithm
Chapter 3 Gate-level Minimization.
COE 202: Digital Logic Design Combinational Logic Part 3
Overview Part 2 – Circuit Optimization
Computer Architecture
Presentation transcript:

Combinational Logic Part 2: Karnaugh maps (quick)

Sum of Minterms Implementation OR all of the minterms of truth table for which the function value is 1 F = m 0 + m 2 + m 5 + m 7 F = X’Y’Z’ + X’YZ’+ XY’Z + XYZ 2

Sum of Products Implementation Simplifying sum-of-minterms can yield a sum of products Difference is that each term need not have all variables Resulting gates  ANDs and one OR F = Y’ + X’YZ’ + XY 3

Two-Level Implementation Sum of products has 2 levels of gates Fig 2-6 4

More Levels of Gates? What’s best? ♦ Hard to answer ♦ More gate delays (more on this later) ♦ But maybe we only have 2-input gates 5

Product of Maxterms Implementation Can express F as AND of Maxterms for all rows that should evaluate to 0 or This makes one Maxterm fail each time F should be 0 6

Product of Sums Implementation ORs followed by AND 7

Karnaugh Map Graphical depiction of truth table A box for each minterm ♦ So 2 variables, 4 boxes ♦ 3 variable, 8 boxes ♦ And so on Useful for simplification ♦ by inspection ♦ Algebraic manipulation harder 8

K-Map from Truth Table Examples There are implied 0s in empty boxes 9

Function from K-Map Can generate function from K-map Simplifies to X + Y (in a moment) 10

In Practice: Karnaugh maps were mildly useful when people did simplification Computers now do it! We’ll cover Karnaugh maps as a way for you to gain insight, ♦ not as real tool 11

Three-Variable Map Eight minterms Look at encoding of columns and rows 12

Simplification Adjacent squares (horizontally or vertically) are minterms that vary by single variable Draw rectangles on map to simplify function Illustration next 13

Example instead of 14

Adjacency is cylindrical Note that wraps from left edge to right edge. 15

Covering 4 Squares is 16

Another Example Help me solve this one 17

In General One box -> 3 literals Rectangle of 2 boxes -> 2 literals Rectangle of 4 boxes -> 1 literal Rectangle of 8 boxes -> Logic 1 (on 3-variable map) ♦ Covers all minterms 18

Slight Variation Overlap is OK. No need to use full m 5 -- waste of input 19

4-variable map At limit of K-map 20

Also Wraps (toroidal topology) 21

Systematic Simplification  A Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2.  A prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more minterms.  Prime Implicants and Essential Prime Implicants can be determined by inspection of a K-Map.  A set of prime implicants "covers all minterms" if, for each minterm of the function, at least one prime implicant in the set of prime implicants includes the minterm. Chapter 2 - Part 2 22

DB CB B D A Example of Prime Implicants  Find ALL Prime Implicants B’D’ and BD are ESSENTIAL Prime Implicants C BD CD BD Minterms covered by single prime implicant DB B C D A AD BA Chapter 2 - Part 2 23

Prime Implicant Practice  Find all prime implicants for: Chapter 2 - Part 2 24

Prime Implicant Practice  Find all prime implicants for: B D A 11 1 C 1 1 A CB DB Chapter 2 - Part 2 25

Algorithm to Find An Optimal Expression for A Function  Find all prime implicants.  Include all essential prime implicants in the solution  Select a minimum cost set of non-essential prime implicants to cover all minterms not yet covered.  The solution consists of all essential prime and the selected minimum cost set of non-essential prime implicants minimum cost selected minimum cost Chapter 2 - Part 2 26

The Selection Rule  Obtaining a good simplified solution: Use the Selection Rule Chapter 2 - Part 2 27

Prime Implicant Selection Rule  Minimize the overlap among prime implicants as much as possible.  In the solution, make sure that each prime implicant selected includes at least one minterm not included in any other prime implicant selected. Chapter 2 - Part 2 28

Selection Rule Example  Simplify F(A, B, C, D) given on the K- map B D A C B D A C 1 1 Essential Minterms covered by essential prime implicants Selected Chapter 2 - Part 2 29

Don’t Care So far have dealt with functions that were always either 0 or 1 Sometimes we have some conditions where we don’t care what result is Example: dealing with BCD ♦ Only care about first 10 30

Mark With an X In a K-map, mark don’t care with X Simpler implementations Can select an X either as 1 or 0 31

Example or What would we have if Xs were 0? 32

Selection Rule Example with Don't Cares  Simplify F(A, B, C, D) given on the K-map. Selected Minterms covered by essential prime implicants 1 1 x x x x x 1 B D A C x x x x x 1 B D A C 1 1 Essential Chapter 2 - Part 2 33

Product of Sums Example  Find the optimum POS solution: Hint: Use and complement it to get the result. F 34