Serial Interfaces Oct 3, 2002. Announcement We will discuss the test at the end of tonight’s lecture. No homework Chap. 9 is not required to be read.

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Presentation transcript:

Serial Interfaces Oct 3, 2002

Announcement We will discuss the test at the end of tonight’s lecture. No homework Chap. 9 is not required to be read.

Class Objectives Serial Interfaces –How do we get two machines to have compatible data exchanges? –What are some common standards?

FIGURE 8-1 Format of an asynchronous serial character. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-2 (a) Synchronous data transmitted with a separate clock Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-2 (b) synchronizing clock encoded with data and transmitted together. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-4 Diagram depicting the operation of a modem. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-5 RS-232 communications interface. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-7 RS-232 logic levels. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-8 Excessive noise on a signal causes data to fall into the transition region. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-9 Examples of asynchronous RS-232 transmitted characters. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-10 RS-232 connector assignment. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-11 DB-25 pin connector. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-12 Minimal interface between DTE and DCE. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-13 Complete RS-232 interface. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE Pin RS-232 serial port connector diagram. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved. 9-Pin25-PinInterchange CircuitDescription 18CDCarrier detect 23RDReceived data 32TDTransmitted data 420DTRData terminal ready 57SGSignal ground 66DSRData set ready 74RTSRequest to send 85CTSClear to send 922RIRing indicator

FIGURE 8-15 Timing diagram illustrating the handshaking process. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-17 (a) Two devices that have been configured as DTE cannot communicate Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-17 (b) a null modem. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-18 Nonstandard interface cable techniques. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-19 EIA RS and 9-position connectors. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-20 EIA graph depicting data signaling rate versus cable length. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-21 EIA RS-422-A balanced electrical interface circuit. Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

FIGURE 8-24 (a) RS-422-A Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.

TABLE 8-6 Summary Table for RS-232, RS-422, and RS-485 Warren Hioki Telecommunications, Fourth Edition Copyright ©2001 by Prentice-Hall, Inc. Upper Saddle River, New Jersey All rights reserved.