Erik Jonsson School of Engineering and Computer Science FEARLESS Engineeringwww.utdallas.edu/~pervin EE/CE 2310 – HON/002 Introduction to Digital Systems.

Slides:

Advertisements

Similar presentations

Digital Circuits.

Advertisements

Prof. Sin-Min Lee Department of Computer Science

ECE 238L Computer Logic Design Spring 2010

ECE 2373 Modern Digital System Design Exam 2. ECE 2372 Exam 2 Thursday March 5 You may use two 8 ½” x 11” pages of information, front and back, write.

1 Homework Reading –Tokheim, Section 5-10, 7-4 Machine Projects –Continue on MP4 Labs –Continue labs with your assigned section.

ECE 301 – Digital Electronics Minterm and Maxterm Expansions and Incompletely Specified Functions (Lecture #6) The slides included herein were taken from.

08/07/041 CSE-221 Digital Logic Design (DLD) Lecture-8:

Combinational Logic1 DIGITAL LOGIC DESIGN by Dr. Fenghui Yao Tennessee State University Department of Computer Science Nashville, TN.

Chapter 3 Combinational Logic Design

Unit 8 Combinational Circuit Design and Simulation Using Gates Ku-Yaw Chang Assistant Professor, Department of Computer Science.

Computer Organization and Assembly Language: Chapter 7 The Karnaugh Maps September 30, 2013 By Engineer. Bilal Ahmad.

Erik Jonsson School of Engineering and Computer Science FEARLESS Engineeringwww.utdallas.edu/~pervin EE/CE 2310 – HON/002 Introduction to Digital Systems.

ENGG 1203 Tutorial Combinational Logic (I) 1 Feb Learning Objectives

Digital Logic and Design Vishal Jethva Lecture No. 10 svbitec.wordpress.com.

Logic Function Optimization. Combinational Logic Circuit Regular SOP and POS designs Do not care expressions Digital logic circuit applications Karnaugh.

Chapter 5 Memory and Programmable Logic 5.1. Introduction 5.2. Random Access Memory 5.3. Memory Encoding 5.4. Read Only Memory 5.5. Programmable Logic.

Introduction to Computer Science David Goldschmidt, Ph.D. Computer Science The College of Saint Rose CIS September 6, 2007.

CHAPTER 1 INTRODUCTION TO DIGITAL LOGIC. K-Map (1)  Karnaugh Mapping is used to minimize the number of logic gates that are required in a digital circuit.

Digital Electronics Lecture 4 Simplification using Boolean Algebra, Combinational Logic Circuit Design.

Digital Circuits Design Chin-Sung Lin Eleanor Roosevelt High School.

Chapter 3: Digital Logic Dr Mohamed Menacer Taibah University

ACOE1611 Combinational Logic Circuits Reference: M. Mano, C. Kime, “Logic and Computer Design Fundamentals”, Chapter 2.

CH51 Chapter 5 Combinational Logic By Taweesak Reungpeerakul.

Department of Computer and IT Engineering University of Kurdistan Computer Architecture (Review of Digital Design) By: Dr. Alireza Abdollahpouri.

ITEC 352 Lecture 3 Low level components(2). Low-level components Review Electricity Transistors Gates Really simple circuit.

Combinational Logic Digital Design Department of Software Development Faculty of Information Technology Islamic University of Gaza Dr. Rebhi Baraka

1 Digital Logic Design Week 5&6 cont’d Revision for Quiz 2/Exam.

Lecture 4 Introduction to Boolean Algebra. Binary Operators In the following descriptions, we will let A and B be Boolean variables and define a set of.

Karnaugh Maps (K maps). What are Karnaugh 1 maps?  Karnaugh maps provide an alternative way of simplifying logic circuits.  Instead of using Boolean.

Designing Combinational Logic Circuits

Boolean Expressions Lecture 3 Digital Design and Computer Architecture Harris & Harris Morgan Kaufmann / Elsevier, 2007.

Karnaugh Maps (K-Maps)

© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.

Erik Jonsson School of Engineering and Computer Science FEARLESS Engineeringwww.utdallas.edu/~pervin EE/CE 2310 – HON/002 Introduction to Digital Systems.

Circuits & Boolean Expressions. A ABC BC ABC C B A Example # 1: Boolean Expression: Develop a Boolean expression from a circuit.

Multiplexors Decoders  Decoders are used for forming separate signals for different combination of input signals.  The multiplexer circuit is a digital.

CEC 220 Digital Circuit Design More Karnaugh Maps Monday, February 02 CEC 220 Digital Circuit Design Slide 1 of 11.

Computer Organization CSC 405 Decoders and Multiplexers.

School of Computer and Communication Engineering, UniMAP DKT 122/3 - DIGITAL SYSTEM I Chapter 4A:Boolean Algebra and Logic Simplification) Mohd ridzuan.

CHAPTER 1 INTRODUCTION TO DIGITAL LOGIC. De Morgan’s Theorem De Morgan’s Theorem.

CEC 220 Digital Circuit Design Minterms and Maxterms Monday, January 26 CEC 220 Digital Circuit Design Slide 1 of 11.

Logic Gates, Boolean Algebra and Karnaugh Maps. Challenge! By the end of todays session can you complete the following?

ACOE161Digital Circuit Design1 Design Of Combinational Logic Circuits.

Circuit Synthesis A logic function can be represented in several different forms:  Truth table representation  Boolean equation  Circuit schematic 

Digital Logic Design. Truth Table  Logic Circuit 1. Start with truth table 2. When your output is a 1, figure out the combination of inputs, ANDs, and.

Lecture 1 Gunjeet kaur Dronacharya group of institutions.

CSIS-110 Introduction to Computer Science

Homework Reading Machine Projects Labs

Computer Science 210 Computer Organization

University of Maryland Baltimore County Department of Computer Science and Electrical Engineering CMPE 212 Laboratory (Discussion 6) Hasib Hasan

EE/CE 2310 – HON/002 Introduction to Digital Systems

Logic Gates, Boolean Algebra and Karnaugh Maps

CHAPTER 1 : INTRODUCTION

Dr. Clincy Professor of CS

Combinational Circuit Design

Boolean Expressions Lecture No. 10.

Computer Architecture CST 250

Jeremy R. Johnson Wed. Sept. 29, 1999

Circuits & Boolean Expressions

Karnaugh Maps (K-Maps)

Dr. Clincy Professor of CS

Homework Reading Tokheim, Section 5-10, 7-4.

ECB2212-Digital Electronics K-Map

CS Chapter 3 (3A and ) – Part 3 of 5

Karnaugh Maps (K maps).

Principles & Applications

Laws & Rules of Boolean Algebra

ACOE101: Freshman Computer Engineering Fall 2018

Circuits & Boolean Expressions

Presentation transcript:

Erik Jonsson School of Engineering and Computer Science FEARLESS Engineeringwww.utdallas.edu/~pervin EE/CE 2310 – HON/002 Introduction to Digital Systems T1-T5,P1P4 Tuesday: Review Chapters T1-T5,P1-P4 Thursday

Decoders & Multiplexers – Dodge Lecture Go over this carefully!! For Lab Assignment #1, see the next slide.

Design Problem You have now seen how to go from a requirement to a truth table to a Boolean Expression to a circuit (and even how to simplify the circuit). You now get to do a design. Do a first try by yourself. Then you may review and complete your design with your EE 2110 lab partner. Here is the requirement (“spec”): A circuit has three input variables, x, y, and z. Its output is 1 for the conditions x, y, z = 0, x, y = 0; z = 1, and x = 0; y, z = 1. Do the following: – Make a truth table from the requirements. – Devise an SOP Boolean expression from the truth table. Simplify it using the relationships discussed today, but keep in SOP form. (Do not use a Karnaugh map!) – In EE 2110 Lab. 1, build your design (see Lab. 1 instructions). – Using all combinations of the input variables, demonstrate with your partner to the lab TA that your real circuit obeys your truth table. Lecture #4: Boolean Algebra and Combinational Digital Logic © N. B. Dodge 01/12

Karnaugh Map Simplify the Boolean expression: _ _ _ _ _ _ _ _ _ _ _ A.B.C.D + A.B.C.D + A.B.C.D + A.B.C.D + A.B.C.D + A.B.C.D = Y 0011 AB

Karnaugh Map Simplify the Boolean expression: _ _ _ _ _ _ _ _ _ _ _ A.B.C.D + A.B.C.D + A.B.C.D + A.B.C.D + A.B.C.D + A.B.C.D = Y 0011 AB

Karnaugh Map Simplify the Boolean expression: _ _ _ _ _ _ _ _ _ _ _ A.B.C.D + A.B.C.D + A.B.C.D + A.B.C.D + A.B.C.D + A.B.C.D = Y 0011 AB _ _ Y = B.C + A.B.C

Multiplexer

Pin Diagrams

We went over Dr. Dodge’s Review for his first test.