FONT IP intra-train feedback prototype status

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Presentation transcript:

FONT IP intra-train feedback prototype status Philip Burrows John Adams Institute Oxford University Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07 Outline Introduction + overview FONT4 system at ATF Design of feedback hardware elements Results of beam tests FONT5 ILC prototype at ATF2 Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

IP intra-train feedback system - concept Last line of defence against relative beam misalignment Measure vertical position of outgoing beam and hence beam-beam kick angle Use fast amplifier and kicker to correct vertical position of beam incoming to IR FONT – Feedback On Nanosecond Timescales Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

FONT: Feedback On Nanosecond Timescales Oxford + Daresbury: Philip Burrows Glenn Christian Hamid Dabiri Khah Tony Hartin Alexander Kalinin Javier Resta Lopez Colin Perry Graduate students: Christine Clarke Christina Swinson Ben Constance Robert Apsimon SLAC, KEK, DESY, CERN Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07 Overview Task: prototype beam-based (intra-train) feedback system Completed: ultra-fast all-analogue feedback prototypes FONT2 / NLCTA: 54ns latency FONT3 / ATF: 23ns latency Ongoing: ILC digital feedback prototype FONT4 / ATF: digital FB processor tests w. 3 bunches Design of feed-forward system FONT@ESA: EM background impact on FB BPMs (Hartin) Future: Multibunch (20 – 60 bunches?) operations, algorithm tests FONT5 / ATF2 Feed-forward Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

FONT4 prototype at KEK/ATF Kicker BPM 1 BPM 2 BPM 3 e- Drive amplifier Analogue BPM processor Digital feedback Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

FONT4 prototype at KEK/ATF Kicker BPM 1 BPM 2 BPM 3 e- Drive amplifier Analogue BPM processor Digital feedback Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07 BPM processor Single stage down-mix to baseband Latency c. 7ns Replaced connectorised version with custom PCB – new version tested November 2006 old Resolution c. 5um new Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Digital Feedback Board JTAG port PROM Xilinx Virtex4 FPGA 40 MHz oscillator GP I/O Header Analog Devices ADC/DACs RS232 comms 2 x Analog Output channels (differential) 4 x General-purpose digital outputs 2 x Analog Input channels (single-ended) 3 x external clock/trigger inputs Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Kicker driver amplifier Specifications: +- 15A (kicker terminated with 50 Ohm) +- 30A (kicker shorted at far end) 35ns risetime (to 90%) pulse length 10 us (specified for 20-60 bunches) repetition rate 10 Hz Order placed with TMD Technologies Sept 06: 1st prototype unit December 1 2nd prototype unit December 8 (5ns faster) Tested with beam at ATF Dec 06, Feb + May 07 Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

FONT4: latency estimate Time of flight kicker – BPM: 4ns Signal return time BPM – kicker: 10ns Irreducible latency: 14ns BPM processor: 7ns ADC/DAC (3.5 89 MHz cycles) 40ns Signal processing (8 357 MHz cycles) 25ns FPGA i/o 3ns Amplifier 40ns Kicker fill time 3ns Electronics latency: 118ns Total latency estimate: 132ns Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

FONT4: beamline at KEK ATF (May 07) Amplifier FEATHER Kicker BPM processor board Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

First closed-loop operation (Dec 06) Beam Position 154ns FB off 1 2 3 Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

First closed-loop operation (Dec 06) FB on Beam Position 154ns FB off 1 2 3 Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Feedback with delay-loop (Feb 07) Incoming bunches 154ns Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Feedback with delay-loop (Feb 07) FB on, no delay loop Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Feedback with delay-loop (Feb 07) FB on, with delay loop Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Feedback with delay-loop (Feb 07) FB on, with delay loop Latency ~ 135ns May 07: optimise gain, delay-loop setting, 1/Q … Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

With 1/Q + optimised gain (May 07) FB off 154ns FB on corrected! ‘banana’ effect Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07 FONT4 test plan Until ATF shutdown for connection to ATF2 (June 08): Continue closed-loop FB tests Close FB loop Delay loop 1/Q normalisation Study + characterise train-train and bunch-bunch jitter Deal with static position offsets in train Adaptive gain ‘Turn-key’ operation Improve BPM resolution to 1um level Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07 FONT4 test plan Until ATF shutdown for connection to ATF2 (June 08): Continue closed-loop FB tests Close FB loop Delay loop 1/Q normalisation Study + characterise train-train and bunch-bunch jitter Deal with static position offsets in train Adaptive gain ‘Turn-key’ operation Improve BPM resolution to 1um level Deploy + commission system at ATF2 ( > October 08) Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07 FONT5 test plan The next major development would be FB tests using a long ILC-like train of 20-60 bunches (FONT4 amplifier was specified to allow this) Depends on success of ATF fast-extraction kicker tests, 2008/9?? Would allow us to make FB algorithms robust: take into account bunch-bunch correlations along train adaptive gain as beam conditions change (drift) incorporate feed-forward information from upstream add beam-related ‘luminosity’ signal for fast scanning? Could in principle be done at FLASH Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07 FONT bench test system Manufacture synchronised ILC bunch-train, clocks, and trigger Develop algorithms and program FPGA Close loop (Include amplifier and dummy kicker also!) Bunch Trigger 2.16 MHz Diagnostic Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07

Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07 FONT goals 2007-10 1) Develop ILC intra-train beam feedback system + contribute engineered design to EDR 2) Deploy prototype system at ATF2 3) Design + simulate integrated global alignment, FB + luminosity tuning strategy for EDR Philip Burrows BDS/MDI session, LCWS07, DESY, 31/05/07