EE 316 Computer Engineering Junior Lab Lecture on PC Parallel port.

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Presentation transcript:

EE 316 Computer Engineering Junior Lab Lecture on PC Parallel port

The IEEE 1284 parallel interface standard Parallel ports are used for connecting a computer (host) to a printer or certain other peripheral devices over a parallel (eight bits of data at a time) physical and electrical interface. Parallel ports conform to the specifications of document of the Institute of Electrical and Electronic Engineers (IEEE) called IEEE Std : Standard Signaling Method for a Bi-directional Parallel Peripheral Interface for Personal Computers, or IEEE 1284 for short.

Modes of operation (The IEEE 1284 standard) Compatibility mode (Default “Forward” mode) Nibble mode (4-bit “reverse” mode) Byte mode (8-bit “reverse” mode) EPP mode (Enhanced Parallel Port mode) ECP mode (Enhanced Capability Port mode) Source: Forward: Host to Peripheral Reverse: Peripheral to Host

25 Pin D-sub or IEEE 1284-A connectors

36 Pin Centronics or IEEE 1284-B connectors

IEEE-1284 compliant Parallel Printer Cables Connector Types IEEE-1284 Printer Type “A” Connector (DB25) This is the connector most commonly used as the computers parallel port output. IEEE-1284 Printer Type “B” Connector (CN36) This is the most commonly used connector for the end of the cable that goes to the printer. IEEE-1284 Printer Type “C” Connector (HPCN36) This is a new connector for the printer end of the cable.

DB-25 Female D-type Connector (on the computer) 8 output pins accessed via the DATA Port (bidirectional) 5 input pins (one inverted) accessed via the STATUS Port (peripheral to HOST) 4 output pins (three inverted) accessed via the CONTROL Port (output only) The remaining 8 pins are grounded

Addressing Standard parallel port uses three contiguous addresses: 3BCh, 3BDh, 3BEh (LPT1) 378h, 379h, 37Ah (LPT1, LPT2) 278h, 279h, 27Ah (LPT1, LPT2, LPT3)) First Address -- Port base address (data registers) Second Address -- (base+1) Port’s status registers Third Address – (base+2) Ports Control Registers In our lab we have a PCI parallel card that uses the Following address: DF18h, DF19h, DF1Ah

Parallel port output drive capabilities The outputs of the data registers are filtered through A 27 Ohm resistor and a 2.2 nF capacitors. The numbers can vary substantially between different port types. For fast transitions and more drive currents it is best to use Schmitt-trigger buffers/inverters at the receiving end.

References