04/26/2006VLSI Design & Test Seminar Series 1 Phase Delay in MAC-based Analog Functional Testing in Mixed-Signal Systems Jie Qin, Charles Stroud, and Foster Dai Dept. of Electrical and Computer Engineering 200 Broun Hall, Auburn University, AL s:

04/26/2006VLSI Design & Test Seminar Series 2 Outline  Motivation and Background  Built-In Self-Test Architecture  Phase Delay in the MAC-based ORA  Experimental Results  Conclusions

04/26/2006VLSI Design & Test Seminar Series 3 Motivation and Background  Why mixed-signal BIST?  The increasing cost of functionality test based on the traditional methodology of external test equipment for modern mixed-signal ICs.  The increasing difficulty to perform test on these ICs. With a rapidly increasing level of integration, the number of input/output (IO) pins does not increase accordingly. With a rapidly increasing level of integration, the number of input/output (IO) pins does not increase accordingly. The operational frequency of latest analog ICs at GHz requires tester electronics very close to the DUT. The operational frequency of latest analog ICs at GHz requires tester electronics very close to the DUT.

04/26/2006VLSI Design & Test Seminar Series 4 Motivation and Background (cont.)  What should a mixed-signal BIST be?  It can extract the frequency spectrum information of the signal coming from the DUT. Linearity Measurement Linearity Measurement Frequency Response Frequency Response Signal-to-Noise Ratio Measurement Signal-to-Noise Ratio Measurement  It should be implemented using simple circuitry with small area penalty and should not cause performance penalty to analog circuitry.  The conventional way to obtain the frequency spectrum is FFT. However, the area penalty and power consumption introduced by a FFT processor is not what a BIST expects.

04/26/2006VLSI Design & Test Seminar Series 5 Motivation and Background (cont.)  The BIST approach based on the DDS- based TPG and MAC-based ORA was proposed.  DDS-based TPG can generate various waveforms which is required for the linearity, frequency response, and SNR measurement.  MAC-based ORA could be realized in a much simpler, cheaper and more flexible circuit, compared with the FFT-based ORA.

04/26/2006VLSI Design & Test Seminar Series 6 Built-In Self-Test Architecture  Most of the BIST circuitry resides in the digital portion of the mixed-signal system. In such a way, the performance penalty are minimized.  The number and location of the MUX inserted to the system determines the accuracy of the analog functional measurements. Am p Test Controller MUX1 MUX2 NCO1 NCO2 NCO3 Sin(2  f 1 ’ nT clk +  1 )f 1 ’,  1 Sin(2  f 2 ’ nT clk +  2 )f 2 ’,  2 f 3 ’,  3 Sin(2  f 3 ’ nT clk +  3 ) DAC DUT MUX3 ADC MUX4 Accm1 Accm2 DC 1 DC 2 MUL1 MUL2 f 1 (nT clk ) f 2 (nT clk ) f(nT clk ) Test Pattern Generator (TPG) Output Response Analyzer (ORA)

04/26/2006VLSI Design & Test Seminar Series 7 MAC-based ORA  While performing the analog functional testing, the DC 1 and DC 2 accumulator values can be described as  Then the the signal f(nT clk )’s Fourier Transform F(  ) can be expressed through DC 1 and DC 2  The magnitude response A(  ) and the phase delay ΔΦ(  ) are the two parameters widely used much more widely in functional measurements of analog circuits.

04/26/2006VLSI Design & Test Seminar Series 8 Phase Delay in MAC-based ORA  How can the phase delay be evaluated?  For an on-chip test, we don’t have to set up a full-length arctan look-up table (LUT) to calculate ΔΦ(  ).  First the absolute phase offset ΔΦ o (  ) need to be calculated according to the following formula:

04/26/2006VLSI Design & Test Seminar Series 9 Phase Delay in MAC-based ORA (cont.)  Then the phase delay can be determined through the absolute phase offset ΔΦ o (  ) according to the following table: |DC 1 |≥| DC 2 ||DC 1 |≤| DC 2 | DC 1 >0; DC 2 >0      DC 1 >0; DC 2 <0      DC 1 0      DC 1 <0; DC 2 <0       The arctan look-up table (LUT) can be decreased by half because the value range of ΔΦ o (  ) varies from 0  to 45 . when DC 2 /DC 1 is very small, the arctan(DC 2 /DC 1 ) can be represented by the ratio of the DC 2 /DC 1. So the length of the arctan look-up table (LUT) can be compressed further.

04/26/2006VLSI Design & Test Seminar Series 10 Phase Delay in MAC-based ORA (cont.)  Once the phase delay is identified, the magnitude response A(  ) can be calculated through the following approaches.  Approach #1  Approach #2  Approach #3

04/26/2006VLSI Design & Test Seminar Series 11 Phase Delay in MAC-based ORA (cont.)  Pros and cons of the three approaches Approach# 1# 2# 3 Hardware overhead lowhigh speedlowhigh constraints It cannot be used for SNR Measurement. no propagation error yes no

04/26/2006VLSI Design & Test Seminar Series 12 Experimental Results I  The phase delay introduced by the digital portion of the BIST circuitry. phase error due to the delay in TPG phase error with delay removed

04/26/2006VLSI Design & Test Seminar Series 13 Experimental Results II  The phase delay introduced by the ADC/DAC pair

04/26/2006VLSI Design & Test Seminar Series 14 Experimental Result III  The resources used by the MAC-based ORA. # of input bits, N # of output bits, M # of input bits, N # of output bits, M Number of slices vs. MAC configuration Number of LUTs vs. MAC configuration

04/26/2006VLSI Design & Test Seminar Series 15 Experimental Result IV  The resources used by a FFT-processor Type # of slices # of 18  18-bit multipliers transform frequency Pipelined kHz Burst I/O kHz Minimum Resources kHz

04/26/2006VLSI Design & Test Seminar Series 16 Comparison of the MAC-based ORA and FFT-based ORA  MAC-based ORA is much simpler and cheaper.  MAC-based ORA is more flexible.  the frequency resolution can be easily tuned with the step size of the sweeping frequency;  it can measure the interested spectrum information at several frequency points or in a narrow bandwidth easily.

04/26/2006VLSI Design & Test Seminar Series 17 Conclusion  phase delay is very important to the implementation and accuracy of the MAC- based ORA.  In comparison with the FFT-based approach, the MAC-based ORA can be realized using much more flexible and simpler BIST circuitry with less area penalty, which is what an ideal BIST scheme is supposed to be.