Presenting: Itai Avron Supervisor: Chen Koren Mid Semester Presentation Spring 2005 Implementation of Artificial Intelligence System on FPGA.

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Presentation transcript:

Presenting: Itai Avron Supervisor: Chen Koren Mid Semester Presentation Spring 2005 Implementation of Artificial Intelligence System on FPGA

Project Goals Creating a VHDL design of a Neural Network Comparison Vs. software implementation (Matlab)

Background Neural Network is a Learning Machine It is build from Neurons (Perceptrons), which holds the knowledge of the system within their inter-connection strength Every Neuron Implement the Active Function:

System Interface Input: - Image (16x16 pixels) - Weights Output: - A number between 0-9 (4 bit vector)

System Architecture MAX Net #0 Net #1 Net #2 Net #9 … Image Register clk resetN net_sel img_en img w ready digit

Net Architecture control SRAM (Xilinx) Neuron w flag Result register result img clk resetN start

Neuron Architecture Multipliers for calculating (Xilinx) Adders for calculating (Xilinx) SRAM implementing Activation Function Registers saving weights

Controller – Flow Diagram Idle Upload Image and Weights Calculate Hidden Layer Calculate Exit Layer New Image Until all Neurons are calculated Upload weight to Neuron Neuron Calculation Save Neuron Result

Still to do Matlab simulation (calculate weights) System improvements VHDL code debugging Final Presentation: ~ October