HRTC Wien 11-13 Sep 2002 Networked Control Loops - An Overview Karl-Erik Årzén.

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HRTC Wien Sep 2002 Networked Control Loops - An Overview Karl-Erik Årzén

HRTC Wien Sep 2002 Outline Overview Analysis and Design –constant network delays –varying network delays JitterBug –analysis of networked control loops TrueTime –simulation of networked control loops

HRTC Wien Sep 2002 Control Network (TCP/IP) OPC Server Data access Control Builder Controllers IO I/O Fieldbuses Intra-net

HRTC Wien Sep 2002 Networked Operations Data presentation & recording Event notification Code distribution Task downloading Commands Control loops ….

HRTC Wien Sep 2002 Motivation Reduced cabling costs Network hardware cheaper Manufacturer independent nodes Modularity and flexibility in system design ….

HRTC Wien Sep 2002 Temporal Determinism The key issue in real-time systems However, temporal determinism is not a yes or no thing. Levels of determinism rather than hard or soft

HRTC Wien Sep 2002 Control - Hard or Soft? Both However, most feedback control loops can manage deadline misses without any problems. Probably easier to find hard r-t in discrete (logic) control “Hard real-time” is a model –often works well –in many cases overly restrictive

HRTC Wien Sep 2002 Control System Characteristics For many controllers a worst-case design approach works well –e.g., PI, PID, … However, a lot of exceptions: –hybrid controllers that switch between different modes with different characteristics –model-predictive controllers (MPC) convex optimization problem solved every sample execution time can easily vary an order of magnitude

HRTC Wien Sep 2002 Delays Networks induce delays: –limited bandwidth –overhead in network interface –overhead in network Time delays in control loops: –give rise to phase lag –degenerate system stability and performance

HRTC Wien Sep 2002

Control messages Small in size Frequent, often periodic “Best consumed before ” Loosing occasional messages is often acceptable

HRTC Wien Sep 2002 Network Types Different networks give different levels of determinism: –constant delay (no jitter) –stochastically varying delays

HRTC Wien Sep 2002 CAN: Experimental Data

HRTC Wien Sep 2002 Ethernet: Experimental data

HRTC Wien Sep 2002 Two Points of View Computer Science –Scheduling principles –Resource allocation –What can be guaranteed? Control –Model the delays –Design of controllers –Robustness, stability, performance

HRTC Wien Sep 2002 Two design approaches Maximize temporal determinism –use protocols and scheduling techniques that maximize determinism –e.g. TTA/TTP –well suited for formal analysis, safety critical systems –matches sampled control theory well –non-COTS, requires complete knowledge Compensate for temporal non-determinism –inherent robustness of feedback –temporally robust off-line design methods –on-line compensation need to measure delays, e.g. “time-stamping” gain-scheduling, feedforward,... Complementary

HRTC Wien Sep 2002 Feedback Scheduling in Control –Scheduling of computing resources (CPU time, bandwidth, memory, power) with guaranteed control performance –Co-design of control and scheduling –Control performance as a QoS parameter (QoC) –Negotiation and contracts –Examples: adjust sampling frequencies dynamically to control CPU utilization adjust execution time quota for any-time controllers to control CPU utilization

HRTC Wien Sep 2002 Outline  Overview Analysis and Design –constant network delays –varying network delays JitterBug –analysis of networked control loops TrueTime –simulation of networked control loops

HRTC Wien Sep 2002 Delay Models Constant delay Random delay –independent from transfer to transfer Random delay –dependent –e.g. probability distribution governed by Markov chain –“Low load”, “Medium load”, “High load”

HRTC Wien Sep 2002 Constant Delays Straightforward Continuous time –e.g. Otto-Smith Controller –e.g. Predictive PI Discrete Time –sampling of a system with time delay –time-invariant finite-dimensional system

HRTC Wien Sep 2002 Robust vs Worst-Case Left: Robust design taking the delay into account Top Right: Design for zero delay Bottom Right: Design for worst-case delay

HRTC Wien Sep 2002 Random Delays More tricky Time-varying system Examples can be found of systems that are stable for all constant delays, but become unstable when the delay varies It is important to be clear of what the available results cover: –constant delays within a certain range –varying delays within a certain range

HRTC Wien Sep 2002 Sampling of systems with varying delays Closed Loop System (plant + controller) Similar for sampling jitter

HRTC Wien Sep 2002 Stability Delays that change according to a finite, repeating cycle Delays that change randomly –Lyapunov stability theory –Stable if we can find a common quadratic Lyapunov function for all delays

HRTC Wien Sep 2002 Stability New stability criterion for systems with varying time delays (Lincoln, 2002) –simple & graphical –Small gain theorem –so far only for open-loop stable processes

HRTC Wien Sep 2002 Frequency Domain Criterium

HRTC Wien Sep 2002 right left Bo Lincoln: “A simple stability criterion for digital control systems with varying delays”, IFAC World Congress, 2002

HRTC Wien Sep 2002 SISO Control - Basic Setup Computational Model: –different possibilities –our approach (Nilsson): time-driven sensor & event-driven controller and actuator

HRTC Wien Sep 2002 Alternative Approach Luck and Ray Make invariant through max-delay buffers Longer delays than necessary Almost always worse than having shorter, varying delays

HRTC Wien Sep 2002 LQG Control - Independent delays Johan Nilsson - PhD –“Real-Time Control Systems with Delays” Time stamping Old delays known when calculating u k –sensor-controller delay up to k –controller-actuator delay up to k-1 Independent random delays with known distributions State feedback –full state information –all states from the same node in the same frame

HRTC Wien Sep 2002 LQG Control Stochastic Riccati equation Updating of S not always possible in real-time

HRTC Wien Sep 2002

Simplifications Off-line calculation of stationary Riccati –tabular for L –interpolation –linear approximation Suboptimal scheme –delay-free feedback vector –predict from time k over average delay

HRTC Wien Sep 2002

Extensions Optimal state estimator Optimal output feedback controller –separation principle holds

HRTC Wien Sep 2002 LQG Control - Dependent delays Delay distributions governed by Markov chain Optimal state feedback –requires knowledge of the delay mode (Markov chain state) Optimal state estimate & output feedback

HRTC Wien Sep 2002 LQG Control: Extensions Markov chain with two transitions every sample –different delay distributions for sender-controller message and controller-actuator message Sampling interval jitter in sensor node –optimal state feedback, estimator & output feedback –requires the solution of the Riccati in every sample Estimation of the Markov state

HRTC Wien Sep 2002 LQG Control: Extensions MIMO Control –multiple sensor and actuator nodes –time-driven sampling (synchronized clocks) –optimal state feedback and estimator results has been derived –based on the delay of the latest received sensor measurement

HRTC Wien Sep 2002 Timeout Can control performance be improved by having a timeout on sensor values?

HRTC Wien Sep 2002 Timeout Control Prediction-Based Controller Two versions: –Lost samples: The delayed samples will eventually arrive and can be used for updating the filters –Vacant samples: The delayed samples are lost

HRTC Wien Sep 2002 Timeout Control 2nd order process, uniform delay on [0,h] LQG optimal control Why wait for a noisy measurement?

HRTC Wien Sep 2002 Multi-rate Periodic Control Asynchronous periodic loops

HRTC Wien Sep 2002 Interesting Delay Patterns Small change in timing patterns Björn Wittenmark, Lund

HRTC Wien Sep 2002 MIMO Controllers - Other approaches Strobe connection –time-driven controller multicasts a message telling the sensors to sample Poll connection –time-driven controller sends individual messages to each sensor node in turn, requesting them to sample

HRTC Wien Sep 2002 Dynamic Delay-Jitter Compensation New approach by Bo Lincoln Assumptions: –time-stamping –full process model not required (only at high frequencies) –delay statistics not needed Approach: –linear compensator as an add-on to an existing controller –frequency domain conditions for stability and performance –loop shaping design –stability compensation and performance compensation

HRTC Wien Sep 2002 Dynamic Jitter Compensation Bo Lincoln: “Jitter Compensation in Digital Control Systems”, ACC 02

HRTC Wien Sep 2002 Collision Detection Opens up interesting possibilities Sensor nodes that detect collisions: –re-send old sample –discard sample –resample and send new sample … –increase sampling interval to reduce communication load - tradeoff Layered model inadequate

HRTC Wien Sep 2002 Outline  Overview  Analysis and Design –constant network delays –varying network delays JitterBug –analysis of networked control loops TrueTime –simulation of networked control loops

HRTC Wien Sep 2002 JITTERBUG Matlab-based toolbox for analysis of real-time control performance Developed by Bo Lincoln and Anton Cervin Calculation of a quadratic performance criterion function Linear process, linear controller Stochastic timing description Theory for jump-linear systems

HRTC Wien Sep 2002 JITTERBUG Analysis

HRTC Wien Sep 2002 Example of a JITTERBUG model

HRTC Wien Sep 2002 Example of analysis

HRTC Wien Sep 2002 Matlab Commands

HRTC Wien Sep 2002 More complicated cases

HRTC Wien Sep 2002 Example: Mechanical Servo Second order system PD controller Case 1: Constant delay 0-100% of h

HRTC Wien Sep 2002 Example: Mechanical Servo Case 2: Random delay uniform [0-a] where a is 0-100% of h

HRTC Wien Sep 2002 Example: Mechanical Servo Constant delay ([a]) - uniform delay [0-a] Always > 0

HRTC Wien Sep 2002 Example: Mechanical Servo Constant delay + delay comp.

HRTC Wien Sep 2002 Example: Mechanical Servo Uniform delay + dynamic delay comp.

HRTC Wien Sep 2002 Outline  Overview  Analysis and Design –constant network delays –varying network delays  JitterBug –analysis of networked control loops TrueTime –simulation of networked control loops

HRTC Wien Sep 2002 TrueTime Simulation of control loops under shared computing resources Developed by Anton Cervin, Dan Henriksson, Johan Eker Simulink-based

HRTC Wien Sep 2002 Main Idea

HRTC Wien Sep 2002 Computer Block Fixed priority EDF (static schedule)

HRTC Wien Sep 2002 Network Block MAC layer

HRTC Wien Sep 2002 Execution Model

HRTC Wien Sep 2002 Controller Realization

HRTC Wien Sep 2002 Example of a Code Function

HRTC Wien Sep 2002 Initialization

HRTC Wien Sep 2002 Screen Dump

HRTC Wien Sep 2002 Example: Networked Control Loop

HRTC Wien Sep 2002 Example: Networked Control Loop

HRTC Wien Sep 2002 Results, without interference

HRTC Wien Sep 2002 Results, with interference

HRTC Wien Sep 2002 Other actors Greg Walsh, Maryland Michael Branicky, Case Western Dawn Tilbury, Univ Michigan Linda Bushnell, Univ Washington KTH/DAMEK... Good overview in IEEE Control Systems Special Issue on Networked Control Systems, February 2001

HRTC Wien Sep 2002 Example: Mechanical Servo Uniform delay ([0,a]) - constant average delay Almost always > 0