1 COMP541 Keyboard Interface Montek Singh April 9, 2007

2 PS/2 Keyboard  Uses a synchronous serial protocol What does that mean? What does that mean?

3  Two lines Clock (10-20KHz) Clock (10-20KHz) Data Data  Pulled high by resistors  Asserted low  Takes away your pushbutton unless you do clever stuff Physical Interface

4Bidirectional  Kybd-to-host and host-to-kybd on same wires CAPS LOCK light for example CAPS LOCK light for example  To send, host takes data line low Sometimes take clk low first Sometimes take clk low first  Then kybd starts clocking Host sends data synced to kybd clock Host sends data synced to kybd clock  You shouldn’t need to send to kybd

5Protocol  11 bits Start – always 0 Start – always 0 8 bits of data 8 bits of data Odd parity bit Odd parity bit Stop bit – always 1 Stop bit – always 1  Clocked by keyboard  Value should be latched on negedge of keyboard clock Illustration from

6 What is Sent  ASCII is not sent  Scan codes for keys Least significant bit first Least significant bit first Illustration from

7 Scan Codes  Normally translated by software You remap your keys, for example You remap your keys, for example  Software takes care of Shift, caps lock, control Shift, caps lock, control

8 Some Scan Codes Long  Two code sequence common  Have a look at Break key!

9 Even More Complicated  Scan code generated when you press  And when you release Two bytes: F0 followed by key scan code Two bytes: F0 followed by key scan code Example: Example:  Space pressed, 29 sent  Space released, F0 29 sent  If you hold key, scan code repeated

10Resources  Information  Scan codes  There is also Verilog for keyboard interfaces available on web.

11 My Verilog  I will post my Verilog code on the web site You should memory-map the character code register You should memory-map the character code register Maybe add a single bit register to indicate that new character has arrived Maybe add a single bit register to indicate that new character has arrived