Copyleft DSPa zer da? DSP Digital Signal Processors Sharc Ezkit-arekin lan ingurunea.

Slides:



Advertisements
Similar presentations
CPU Structure and Function
Advertisements

Clare Smtih SHARC Presentation1 The SHARC Super Harvard Architecture Computer.
Is There a Real Difference between DSPs and GPUs?
Jan 28, 2004Blackfin Compute Unit REV B A comparison of DSP Architectures BlackFin ADSP-BFXXX Compute Unit Based on a ENEL white paper prepared by.
Digital Signal Processors: fundamentals & system design Lecture 1
Microprocessor or Microcontroller Not just a case of “you say tomarto and I say tomayto” M. Smith, ECE University of Calgary, Canada.
Overview of Popular DSP Architectures: TI, ADI, Motorola R.C. Maher ECEN4002/5002 DSP Laboratory Spring 2003.
Processor System Architecture
Microcomputer Systems 1
May 2007Alon Slapak, Afeka college of 271 DSP: Digital Signal Processors Introduction EZ-KIT Fundamentals Architecture Developmen t flow Introduction At.
1 Analog Devices TigerSHARC® DSP Family Presented By: Mike Lee and Mike Demcoe Date: April 8 th, 2002.
Blackfin ADSP Versus Sharc ADSP-21061
TigerSHARC processor and evaluation board Different capabilities Different functionality.
Analog Device Chipsets Featured In New Mobile Phones Eric Tong April 6, 2004.
ENCM 515 Review talk on 2001 Final A. Wong, Electrical and Computer Engineering, University of Calgary, Canada ucalgary.ca.
Microprocessor or Microcontroller Not just a case of “you say tomarto and I say tomayto” M. Smith, ECE University of Calgary, Canada.
1 Architectural Analysis of a DSP Device, the Instruction Set and the Addressing Modes SYSC5603 (ELG6163) Digital Signal Processing Microprocessors, Software.
1 SHARC ‘S’uper ‘H’arvard ‘ARC’hitecture Nagendra Doddapaneni ER hit HAR ect VARD ure SUP Arc.
20 October 2003WASPAA New Paltz, NY1 Implementation of real time partitioned convolution on a DSP board Enrico Armelloni, Christian Giottoli, Angelo.
Alyssa Concha Microprocessors Final Project ADSP – SHARC Digital Signal Processor.
Microprocessor or Microcontroller Not just a case of “you say tomarto and I say tomayto” M. Smith, ECE University of Calgary, Canada.
Microprocessor or Microcontroller Not just a case of “you say tomarto and I say tomayto” M. Smith, ECE University of Calgary, Canada.
Ehsan Shams Saeed Sharifi Tehrani. What is DSP ? Digital Signal Processing (DSP) is used in a wide variety of applications, and it is hard to find a good.
The World Leader in High Performance Signal Processing Solutions Low Cost JTAG Emulator for Blackfin® Processors.
The 6713 DSP Starter Kit (DSK) is a low-cost platform which lets customers evaluate and develop applications for the Texas Instruments C67X DSP family.
Embedded Systems Design
Embedded Systems Design ICT Embedded System What is an embedded System??? Any IDEA???
Real time DSP Professors: Eng. Julian Bruno Eng. Mariano Llamedo Soria.
SIP / H.323 / IAX telephone customization 3 rd term presentation Brendan Marlborough Supervisor: Alfredo Terzoli.
Using Analog Devices’ Blackfin for Embedded Processing Diana Franklin and John Seng.
Ultra sound solution Impact of C++ DSP optimization techniques.
Processor Architecture Needed to handle FFT algoarithm M. Smith.
Stack Stack Pointer A stack is a means of storing data that works on a ‘Last in first out’ (LIFO) basis. It reverses the order that data arrives and is.
DSP Lecture Series DSP Memory Architecture Dr. E.W. Hu Nov. 28, 2000.
CPU Design. Introduction – The CPU must perform three main tasks: Communication with memory – Fetching Instructions – Fetching and storing data Interpretation.
DSP Processors We have seen that the Multiply and Accumulate (MAC) operation is very prevalent in DSP computation computation of energy MA filters AR filters.
Lab. 4 Demonstrating and understanding multi-processor boot TigerSHARC multi-processor system.
1 Computer Organization Notes: Test 2 on Thursday TA office hours moved from Fri to Wed this week: Wed 9-11 (Mehul); Wed 12-3 (Vivek) in JEC 6119 Today:
Overview of Super-Harvard Architecture (SHARC) Daniel GlickDaniel Glick – May 15, 2002 for V (Dewar)
SHARC DSPs SHARC is a DSP architecture designed and fabricated by Analog Devices, Inc. As of Spring 2005, they manufacture and sell 22 DSPs based on the.
FLAC Audio Player An ability to decode files stored in the FLAC format. An ability to select files stored on the device. An ability to display visualization.
ECE 3551 MICROCOMPUTER SYSTEMS 1 Introduction to Visual DSP++
ECE 477 Design Review Team 5  Spring 2010 Fred Grandlienard Andrew Gregor Kevin Mohr Ryan DeFord.
Overview von Neumann Architecture Computer component Computer function
The “Drink Mixer” Design Constraints. Project Success Criteria An ability to digitally mix audio and adjust individual levels An ability to digitally.
More on Pipelining 1 CSE 2312 Computer Organization and Assembly Language Programming Vassilis Athitsos University of Texas at Arlington.
More on Pipelining 1 CSE 2312 Computer Organization and Assembly Language Programming Vassilis Athitsos University of Texas at Arlington.
1 Basic Processor Architecture. 2 Building Blocks of Processor Systems CPU.
Copyright © Avnet, Inc., Analog Devices, Inc. All rights reserved. Available Blackfin Resources Blackfin Home Page: –
Team 6. Guitar Audio Amplifier Audio Codec DSP Wireless Adapter Motor Array PC LCD Display LED Arrays Pushbutton or RPG Input Device
ELECTRONIC SIGNAL PROCESSING 1. Classification of the signal processing systems 2. Electronic signal processing 3. DSP. Main kinds of DSP. The structure.
DaVinci Overview (features and programming) Kim dong hyouk.
STUDY OF PIC MICROCONTROLLERS.. Design Flow C CODE Hex File Assembly Code Compiler Assembler Chip Programming.
DSP Processor
Software Defined Radio PhD Program on Electrical Engineering
Embedded Systems Design
Microcomputer Systems 1
Digital Signal Processors
Subject Name: Digital Signal Processing Algorithms & Architecture
Microcomputer Systems 1
Subject Name: Digital Signal Processing Algorithms & Architecture
Introduction to Digital Signal Processors (DSPs)
Developing a multi-thread product -- Introduction
Program Flow on ADSP2106X SHARC Pipeline issues
Overview of SHARC processor ADSP and ADSP-21065L
Digital Signal Processors-1
Introduction to 5685x Series
Overview of SHARC processor ADSP-2106X Memory Operations
ADSP 21065L.
* M. R. Smith 07/16/96 This presentation will probably involve audience discussion, which will create action items. Use PowerPoint.
Presentation transcript:

Copyleft DSPa zer da? DSP Digital Signal Processors Sharc Ezkit-arekin lan ingurunea

DSPa zer da? Gai zerrenda DSP zer da? ADSP-2106x Sharc-en arkitektura Lan ingurunea Talk-throu, FIR eta Squelch praktikak

DSPa zer da? DSP=Seinale Digitala denbora errealean  Prozesatzeko Konboluzioa, Fourier, Korrelazioa:  x i  y j Biderkatu eta gehitu. MAC eragiketa, M ultiplay and AC umulate Memoria 2, Datu bus 2

DSPa zer da? Saturazio kontrola Gainezka egite “analógikoa” vs. 2ren konplementua Pipelining Irakurri agindua, eragigaiak, eragiketa egin, idatzi

DSPa zer da? x0x0 x1x1 x2x2 x3x3 … x N-2 … x N-1 Datuak eta programa banatuak Harvard arkitektura Buffer zirkularra Kudeaketa automatikoa FFTa egiteko direkzio bit-en trukaketa

DSPa zer da? NEC µPD7720 eta AT&T DSP urtea NECAT&T Texas Instruments TMS32010, … 1983 Texas Instruments Hedapen oso zabala Motorola Motorola Analog Devices 2101, … Programatzeko erreza Improv Systems Jazz DSP Improv Systems Konfiguragarria VLIWVLIW Ceva Zein DSP daukazu eskuetan? Ceva Historia GNU Free Documentation LicenseGNU Free Documentation License

DSPa zer da? Analog Devices-en DSPen garapena

DSPa zer da? Analog Devices-en DSPen garapena

DSPa zer da? Aukera anitzak ADSP-21xx Famila bateragarri zabal eta anitza SHARC Super Harvard Koma higikorra TigerSHARC Indartsuago Blackfin Kontsumoa murriztua tresna mugikorretarako SigmaDSP AD/DA eta anplifikadorea barne

DSPa zer da? 21xx familiaren garapena

DSPa zer da? 21xxx Sharc familiaren garapena

DSPa zer da? ADSP-2106x Sharc arkitektura

DSPa zer da? Sharc arkitektura. Kalkuloak Unitate independenteak MAC, ALU, Shifter Ziklo bakarrean egin daiteke: 4 eragigai irakurri Emaitza 2 irakurri

DSPa zer da? Sharc arkitektura. Kalkuloak Zenbaki formatoak Koma finka 32 bit Koma higikorra 32 edo 40 bit Koma finkoan 80 biteko akumuladore hedatua overflow eta underflow-a egon ez dadin 0’4  0’2 = 0’08  0’0 + 0’3  0’5 = 0’15  0’1 = 0’23  0’2  0’1

DSPa zer da? Sharc arkitektura. DAG, Helbide sorgailua FFTarendako Bit reversing

DSPa zer da? Sharc arkitektura. DAG, Helbide sorgailua Pre/post modify 21xx baino malguago Buffer zirkularrak edozein tokitan

DSPa zer da? Sharc arkitektura. Programa sekuntziadorea Aginduen katxea 3 bus efektibo: x, y, aginduak Jausiak aurreikusi Pipeline: fetch, decode, execute

DSPa zer da? Sharc arkitektura. Programa sekuntziadorea 48 biteko aginduak. Ortogonala Ia dekodetuak Buklea zikloak gastatu gabe Etenak zikloak gastatu gabe Erregistro orokorren multzo sekundarioak PC stack, Loop stack Lagin bakoitzak eten bat

DSPa zer da? Sharc arkitektura. Memoria 32 biteko helbideak Barne memoria, beste prozesadoretan, kanpokoa. Barne memoria guztira: – 1 Mbit – 4 Mbit – 2 Mbit 2 banku konfiguragarritan banatua DM (32 bit) + PM (48 bit) EZ-KIT Sharc: 0 bankua = 8 kW PM + 4 kW DM(Y) 1 bankua = 16 kW DM(X) 8kWp  48bit/Wp + (4 +16)kWd  32bit/Wd = = 1024 kbit

DSPa zer da? SHARC EZ-KIT LITE Document Library Getting Started with the SHARC EZ-KIT LITE SHARC EZ-KIT LITE Reference Manual ADSP Family Development Software Tools Release Note ADSP Family Assembler Tools ADSP Family C Tools Manual ADSP Family C Runtime Library ManualC Runtime Library ADSP-2106x SHARC User’s Manual ADSP-2106x Family Data Sheets Digital Signal Applications Using the ADSP Family, Vol.1 SHARC Third Party Information

DSPa zer da? SHARC EZ-KIT LITE software garapenerako tarjeta ADSP Codec AD/DA Audio In/Out LEDak, 5 Botoiak, 3

DSPa zer da? Softwarea. Analog EZ-KIT LITE Host programa: Programak kargatu eta abiarazi Memoria ikusi Demoak frogatu Visual DSP++ Ingurune bateratua Aginduen lerroa Konpilatu, kargatu, depuratu. VisualAudio, VisualFone,… Blokeak, libreriak,…

DSPa zer da? Softwarea. TDSII, ezplot C programa editatu (2.1 orria) ezkit.h hardwarrarekin lotura (2.3 orr.) DOS sesioa ireki, EZKit Sharc 21k Tds ikonoarekin Konpilatu: Make programa Kargatu: Load programa Monitorizatu: ezplot Konektatu eta neurtu in/out estero hmake eta hload PCaren kontsola erabiltzeko

DSPa zer da? Monitorizatu. Ezplot DSParen memoria ikus daiteke Zenbakiz edo grafikoki Balioak eta bektoreak Denboran eta frekuentzian ezplot.cfg testu artxiboan konfiguratuz Laguntza azalpenak: ezplot.txt (2.7 orr.)

DSPa zer da? Talk-throu Hasieratu Lagin eten bakoitzean: Left input  (Prozesatu gabe)  Left output main funtzioan: Itxaron Lagin prozesaketa, codec_inout Trama prozesaketa, main xi[n]xi[n] n x o [0]x o [1]x o [2]x o [3]x o [4]x o [5]

DSPa zer da? FIR iragazkia prelab-en kalkulatu: Koefizienteak eta Frekuentzia erantzuna Programa idatzi Libreriako funtzioa, Bufferra, … Laborategian FIR inplementatu Erantzuna egiaztatu r=0.9  r  f   f s /2 |H(  )| x0x0 x1x1 x2x2 x3x3 … x N-2 … x N-1 x0x0 x1x1 x2x2 x3x3 … x N-2 … x N-1

DSPa zer da? Preguntas ?