The Architecture of Konrad Zuse’s Early Computers Raúl Rojas Freie Universität Berlin

Konrad Zuse ( )

Topics Overview Arithmetic in the Z1 and Z3 The processor The datapath Highlights Were the Z1 and Z3 universal?

The chronology Z Z21939 Z S „Sondermaschine 1“ S „Sondermaschine 2“ Z

The Z1 and Z3 Z1 ( ) Z3 ( ) - mechanical design - programmable (punched tape) - basic arithmetic operations - completely binary - floating-point machine - built with relays - logically equivalent to the Z1

The original Z1 (Berlin 1938)

A mechanical computing machine...

The Z3 (1941): built out of relays Memory Processor

Light and shadow...

The punched tape reader

The block architecture Binary memory 64 words mantissa FP processor exponent Numeric keyboard Numeric display control unit punched tape

Decimal input = _ decimal exponent sign decimal mantissa

In the Z1 and Z3 IEEE Standard Floating-Point Coding exponent mantissa +, - exponent mantissa +, - 1 bit 6 bit 14 bit 1 bit 7 bit 24 bit

Normalized floating-point and rounding exponent 1 bit 6 bit 14 bit mantissa copy to register in processor 1. leading one two extra rounding digits

Numerical exceptions zero (lowest exponent) + infinite (highest exponent) - infinite 0 / 0 0 * infinite infinite - infinite Special coding for : The machine stops at :

The instruction set - Arithmetic AdditionLs SubtractionLs MultiplicationLm DivisionLi Square rootLw mnemonic 8-bit code

The instruction set - data handling Load Pr Store Ps Binary to decimal Ld Decimal to binary Lu mnemonic 8-bit code

Structure of the processor Register 1 exponent mantissa Register 2 R1 R2 Adders ( +, - )

A simple program (a+b)*c Luread decimal number to Register 1 Luread decimal number to Register 2 Ls1add Ps 10store result in address 10 Luread decimal number to Register 1 Pr 10read from address 10 to Register 2 Lmmultiply Ldshow the decimal result

The microsequencers conducting rod: advances one position per cycle step 1 step 2 step 3 step 4 step 5

Pipelining next instruction Instruction store Store operations run in “zero” cycles

Carry look-ahead Addition was performed in three steps: compute sum (XOR) compute all propagated carries produce final result With relays addition can be performed in constant time (not logarithmic time)

Shifting Shifting can be done using a shifting tree (in logarithmic time) With relays shifting can be done in constant time

Java simulation of the Z3

The mechanical relays

bit A bit B control bit C = 0 = 1 = 0 A mechanical relay ( B = A AND C ) = 0

bit A bit B control bit C A mechanical relay ( B = A and C ) = 0 = 1

bit A bit B control bit C A mechanical relay ( B = A and C ) = 0 = 1

A two-bit multiplexer bit A bit B bit C = A

A two-bit multiplexer bit A bit B bit C

A two-bit multiplexer bit A bit B bit C = B

The mechanical memory Zero prepare operation

The mechanical memory prepare operation move to “1”

The mechanical memory move to “1” store 1

The Z4 in Zurich

Question: Were the Z1 and Z3 universal? YES

A single arithmetical loop is universal we only need 6 instructions: LOAD STORE + - * /

Arithmetical operations a = b op c LOAD b LOAD c op STORE a Compiled code

Simulating branching section section section “execute section 3 = 011”

Transform all operations Compute at the beginning of each section t : t = 1 - [(b 1 - z 1 )(b 2 - z 2 )(b 3 - z 3 )] 2 t is only zero if we are in the desired section

Transform operations Transform a = b op c into a = a  t + (b op c) (1 - t) this means: only operations in the desired section modify the memory contents

The halting problem But how do we stop the loop? -compute 0/q in each iteration -the machine stops when q=0

Summary Z Z2 39 Z Z The logarithmic machine The „logical“ machine Theoretical machines Algebraic machines Special machines S1 42 S2 44

The S1 and S2 ( ): fixed point Z3‘s Binary memory (5-6 words) Numeric keyboard Numeric display control unit punched tape mantissa FP processor exponent mantissa processor (relays) Program

Die Rekonstruktion der Z3

Das Pipeline Dr. Frank Darius (FU Berlin) - Schaltungsentwurf Georg Heyne (Fritz-Haber-Institut) - Hardwareentwurf Wolfram Däumel (Fritz-Haber-Institut) - Layout Lothar Schönbein (Fritz-Haber-Institut) - Fertigung Torsten Vetter (Fritz-Haber-Institut) - Mikrokontroller Cüneyt Göktekin (FU Berlin) Programmierung Mit Beiträgen von: Alexander Thurm, Fabian Stehn, Georg Wittenburg (FU Berlin)