CPS 101 Introduction to Computational Science Wensheng Shen Department of Computational Science SUNY Brockport
Computer Instruction Sets Binary numbers Hexadecimal numbers Octal numbers Machine instructions
Binary numbers Base-2 number system, represents numeric values using two symbols, 0 and =
Hexadecimal numbers Base-16 number system, represents numeric values using 16 symbols, 0, 1, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, and f 100 = 6×
Octal numbers Base-8 number system, represents numeric values using 16 symbols, 0, 1, 3, 4, 5, 6, and = ×
Place-value system 908,305,688 =
Number conversion EB
The memory of the IAS consist of 1000 storage locations, call words, of 40 binary digits (bit) each. Both data and instructions are stored there. Hence, numbers must be represented in binary form, and each instruction also has to be a binary code. Each number is represented by a sign bit and a 39-bit value. A word may also contain two 20-bit instructions, with each instruction consisting of an 8-bit operation code (Op code) specifying the operation to be performed, and a 12-bit address designating one of the words in memory, number from 0 to Sign bit (a) Number word Left instruction Right instruction Op code AddressOpcodeAddress
IAS - details Set of registers (storage in CPU) Memory Buffer Register (MBR) Memory Address Register (MAR) Instruction Register (IR) Instruction Buffer Register (IBR) Program Counter (PC) Accumulator (AC) Multiplier Quotient (MQ)
Structure of IAS – detail Fetch cycle and Execution cycle, which taken together is the Instruction cycle. Program control unit (PCU)
IAS Instruction Set
How IAS Computer Adds Two Numbers Suppose the numbers are stored in memory locations 200 and 201, and The sum is to be saved in memory location 202 InstructionOpcodeDescription LOAD M(200) AC ← M(200) ADD M(201) AC ← AC+M(201) STOR M(202) M(202) ← AC
IAS Computer Instruction Code Load200Add201 Stor202
Storage in Memory First program word Second program word Word 200 Word 201 Word 202 Address Memory Program Counter, PC Address 0 Address max
IAS Instruction Cycles Place the starting address in program counter (PC). Start program: MAR ← PC Read memory: IBR ← MBR ← M(MAR), fetch cycle Place left instruction in IR and address 200 in MAR Read memory: AC ← M(200), fetch cycle Place right instruction in IR and address 201 in MAR Read memory and add: AC ← AC + M(201), execution cycle PC ← PC + 1
IAS Instruction Cycles (Cont.) MAR ← PC Read memory: IBR ← MBR ← M(MAR), fetch cycle Place left instruction in IR and address 202 in MAR MBR ← AC Write memory