2/11/2010 BEARS 2010 On PTIDES Programming Model John Eidson Jeff C. Jensen Edward A. Lee Slobodan Matic Jia Zou PtidyOS PTIDES Design Workflow Distributed Real-Time System Implementation Programming Model Programming Temporally Integrated Distributed Embedded Systems Based on Discrete-Event semantics Event processing in time-stamp order Relates model time to physical time at environment interfaces d 0 – sensor latency Leverages time synchronization across distributed platforms (IEEE 1588 protocol over Ethernet) d – comm. latency, ε – sync. error LTTA [Benveniste et al. 06,07,08] PTIDES [Lee et al. 08,09] Semantics Synchronous-Reactive Global ticks s: N → V ε Discrete-Event Metric for time between events s: R + ×N → V ε Determinism Monotonic actors in Scott orderCausal actors in Cantor metric Monotonic actors in prefix order Execution Terminates before new trigger (Instantaneous wrt model time) Static schedule Faster or slower than model time Preemption allowed Dynamic schedule Environment Data-sampled (Time-triggered) Sensor event may be overwritten Coordination with respect to model time Event-triggered Sensor events queued Coordination wrt model and physical time Communication Loosely time synchronized: T min < c i k – c i k-1 < T max between any two ticks of i there is at most two ticks of j Communication delays bounded Time-triggered, asynchronous FIFO channel abstraction: lossless, in-order Time synchronized: -Δ < c i k – c j k < Δ Communication delays bounded Event-triggered, synchronous Arbitrary lossless topology Semantic Preservation Backpressure control (skipping) Correct even w/o execution times and communication delays Safe-to-process (physical vs model time check) Correct even w/o execution times HW Platform Software Component Library Ptides Model Code Generator PtidyOS Code Plant Model Network Model HW in the Loop Simulator Causality Analysis Program Analysis Schedulability Analysis Analysis Mixed Simulator Is a library linked against application C code. Executes PTIDES semantics Local execution strategy includes a safe to process analysis and resource scheduling layer. Current implementation uses a Single Stack Steps away from threading model To ensure event of highest priority is always processed first, interrupts play an important role: Event processing is done within Interrupt service routines Reentrant interrupts No dynamic memory allocation. Event Processing Algorithm Sequence Diagram *The use of a single stack and interrupts for mutual exclusion was done in TinyOS. PtidyOS uses these concepts and introduces time semantics. Application: The Tunneling Ball Device Cyber-physical system with real-time constraints Event-driven signals (motor encoding, object detection) Parallels an automotive engine control unit (ECU) Balls drop above a rapidly spinning disc Device must adjust disc to allow ball to pass through a small hole, without stopping disc Comparison Between Synchronous Reactive and PTIDES Implementations