1 Nir Shavit Tel-Aviv University and Sun Microsystems Labs (Joint work with Maurice Herlihy of Brown University) © Herlihy and Shavit 2004 The Topological Structure of Asynchronous Computability

2 From the New York Times … May 7 th, 2004 – “Intel said on Friday that it was scrapping its development of two microprocessors, a move that is a shift in the company's business strategy….” May 8 th,2004 – “Intel … [has] decided to focus its development efforts on “dual core” processors …. with two engines instead of one, allowing for greater efficiency because the processor workload is essentially shared.”

3 The Future of Computing  Speeding up uniprocessors is harder and harder  Intel, Sun, AMD, now focusing on “ multi-core ” architectures  Soon, every computer will be a multiprocessor

4 What has this got to do with theory? Alan Mathison Turing. Forefather of Computer Science. Inventor of the Turing Machine.

Turing Computability fr#arazrw4ptlrsr01 gak030 A mathematical model that captures what is and is not computable on uniprocessors… Turing-Machine

6 Time and Asynchrony “Time is Nature’s way of making sure that everything doesn’t happen all at once.” (Anonymous, circa 1970) Real world asynchrony: no “clock in the sky”

7 Asynchronous Computability A mathematical model capturing what is and is not computable by multiple processors in an asynchronous environment Shared Memory/Network

8 Asynchrony Complicates Life A multitude of concurrent executions Asynchrony Synchrony A single execution Seek help from modern mathematics!

9 FLP  Fischer Lynch and Paterson  Showed that Asynchronous computability ≠ Turing computability  Consensus Trivial in uniprocessor Impossible with 1 asynchronous failure  Reasoned directly about executions

10 Graph Theory  Biran, Moran, Zachs 1988  Single asynchronous failure  Coordination problem is a graph  Problem is asynchronously computable iff graph is connected

11 More Graph Theory  Fischer Lynch 82, Dolev Strong 83, Merritt 85, Dwork Moses 90, …  Synchronous crash failures  Computation state is a graph  Consensus not computable while graph is connected

12 Limitations of Graph Theory  Asynchronous model Multiple failures?  Synchronous model Problems beyond consensus?  Need a more general notion of connectivity

13 The Topological Approach  Borowsky Gafni STOC93  Herlihy Shavit STOC93, JACM1999  Saks Zaharoglou STOC93, SICOMP2000  Showed k-set agreement impossible  Generalization of consensus [Chaudhuri 90]  Open problem for several years

14 The Topological Approach  Computations as geometric objects  Use topological methods to show existence of “bad” executions.  Borowsky & Gafni  Sperner’s Lemma  Herlihy & Shavit  Simplicial complexes & homology  Saks & Zaharoglou  Brouwer’s fixed-point theorem

15 Example: Autonomous Air-Traffic Control 35,000 f t 34,000 f t 33,000 f t 32,000 f t 31,000 f t 36,000 f t DL227 AA082 AL991 Pick your own altitude. How many slots do we need to allow safe coordination?

16 Renaming  Process has input name (flight #)  Must generate output name (altitude)  Interested in comparison-based protocols: Equality: A=B? Order: A<B? Nothing else (rules out trivial solutions)

17 History  Proposed by Attiya, Bar-Noy, Dolev, Peleg, and Reischuk  They showed Solution for 2n-1 names Impossibility for n+1 names Intermediate values?  Long-standing open problem … Topological methods finally showed … Intermediate values also impossible

18 A Vertex Point in high-dimensional Euclidean Space

19 Simplexes Dimension solid tetrahedron solid triangle line point

20 Complexes Glue simplexes to form complexes

21 A Cycle OK to think of it as oriented path Also works in higher dimensions

22 A Boundry A cycle is a boundry if it goes around a “solid” region Encompases no holes

23 Not Every Cycle is a Boundry Goes around a hole

24 Connectivity  A complex is n-connected if  Every cycle of dimension n or less  Is also a boundary  No “holes” in any dimension  Fundamental group is trivial  Higher homology groups trivial

25 Chromatic Complexes Each (n-1)-simplex colored by n distinct colors Corresponding to process ids

26 Chromatic Simplicial Map Color-preserving vertex-to-vertex map That also carries simplexes to simplexes

27 Chromatic Simplicial Maps Preserve Connectivity Cannot map boundries around holes

28 Vertex = Process State Process id (color) Value (input or output) 2

29 Simplex = Global State

30 Complex = Global States

31 input complex (all possible flights) output complex (all consistent slot choices) A Decision Task 2 Planes, 2 Slots Task spec relation AA082 AL

32 input complex output complex P, AL991 AA082 DL Planes, 3 Slots

33 input complexoutput complex R 3 Planes, 4 Slots

34 Shared Memory Computation  Asynchronous  arbitrary delays  e.g., interrupts, page faults, etc.  Wait-free  Processes can fail or be slow  Communication by reading and writing shared memory

35 Asynchronous Computability Theorem A task has a wait-free solution if and only if one can chromatically subdivide its input complex so that there exists a chromatic simplicial map to its output complex that refines the task specification map. Simplicial map task spec Input complex output complex

36 Asynchrony and Continuity AL991: post(1) look() decide AA082: post(1) look() decide (1, ) (,1) (1,1)(1,1)(1,1)(1,1)   decide AA081 AL112 Houston, we have a problem … 1 ? ? 1 If there were a continuous map … problem goes away 1 2

37 Three Process Protocol Complex DL227 runs solo AA081 and AL112 run solo (Some simplexes omitted for clarity)

38 In General Input complex Output complex Protocol complex  R AL991 AA082 DL227 Task def

39 2 Plane 3 Slot Renaming A comparison based algorthm: only compares planes ids. PQ P,1 Q,1 P,3 P,2 Q,3 Q,2 If view = (my_id, ) decide 1 else if my_id < his_id decide 2 else decide 3 single chromatic subdivision of input complex P P Q Q simplicial map

40 3 Planes 4 Slots  Impossibility by reduction  Assume a protocol for 3 airplanes, 4 slots  Choose  0 if your name is even  1 if your name is odd  Result  Not all odd  Not all even

41 Output Complex (3 processes)

42 Protocol Complex (schematic)

43 Boundary = 2-Process Executions

44 Protocol Complex for One Process Execution P( ) decides 1 WLOG P( ) decides 1 by symmetry

45 2-Process execution might be mapped this way … protocol output boundary Wraps around -1 times

46 2-Process execution might be mapped that way … protocol output boundary Wraps around +2 times

47 In general … protocol output boundary Wraps around hole 3k-1 ≠ 0 times

48 But a Simplicial Cannot Map a Boundary Around a Hole … QED! Hole is an obstruction

49 35,000 f t 34,000 f t 33,000 f t 32,000 f t 31,000 f t DL227 AA082 AL991 So 3 Planes Need At Least 5 Slots!

50 Topological Representation Concurrency Arguments about geometric objects The Power of the Asynchronous Computability Theorem A multitude of concurrent executions Asynchrony

51 The Glorious Future  Our work Asynchronous, wait-free, one-shot, RW memory  Open problems Long-lived computations Other kinds of memory (compare&swap) Randomization Other progress conditions …

52 3 Planes 6 Slots R Continuous

Planes 5 Slots R Continuous

54 3 Planes 4 Slots Not Computable is just R Gotta Punch a Hole