Revised: Aug 1, 20031 EE4390 Microprocessors Lesson 6,7 Instruction Set, Branch Instructions, Assembler Directives.

Slides:



Advertisements
Similar presentations
Chapter 2: Data Manipulation
Advertisements

H. Huang Transparency No.1-1 The HCS12/MC9S12 Microcontroller Copyright © 2010 Delmar Cengage Learning HCS12 Instruction Examples The LOAD and STORE Instructions.
Microprocessors.
9/20/6Lecture 3 - Instruction Set - Al Instruction Set.
2.3) Example of program execution 1. instruction  B25 8 Op-code B means to change the value of the program counter if the contents of the indicated register.
EET 2261 Unit 5 Tables; Decision Trees & Logic Instructions
HCS12 Arithmetic Lecture HC12 Arithmetic Addition and Subtraction Shift and Rotate Instructions Multiplication Division.
Addressing Modes & Instruction Set By: Prof. Mahendra B. Salunke Asst. Prof., Department of Computer Engg., SITS, Pune-41 URL:
© 2010 Kettering University, All rights reserved..
Gursharan Singh Tatla 21-Nov-20101www.eazynotes.com.
COMP3221: Microprocessors and Embedded Systems--Lecture 7 1 COMP3221: Microprocessors and Embedded Systems Lecture 7: Arithmetic and logic Instructions.
© 2006 Pearson Education, Upper Saddle River, NJ All Rights Reserved.Brey: The Intel Microprocessors, 7e Chapter 5 Arithmetic and Logic Instructions.
9-1 ECE 424 Design of Microprocessor-Based Systems Haibo Wang ECE Department Southern Illinois University Carbondale, IL x86 Instructions Part.
Programming the HC12 in C. Some Key Differences – Note that in C, the starting location of the program is defined when you compile the program, not in.
Microcontroller Fundamentals & Programming
Parul Polytechnic Institute Parul Polytechnic Institute Subject Code : Name Of Subject : Microprocessor and assembly language programming Name.
© 2010 Kettering University, All rights reserved..
Lecture 18 Last Lecture Today’s Topic Instruction formats
The M68HC11 Basic Instruction Set Basic Arithmetic Instructions
Chapter 2: 68HC11 Assembly Programming
H. Huang Transparency No.2-1 The 68HC11 Microcontroller Chapter 2: 68HC11 Assembly Programming The 68HC11 Microcontroller.
The 8051 Microcontroller and Embedded Systems
Khaled A. Al-Utaibi  Introduction  Arithmetic Instructions  Basic Logical Instructions  Shift Instructions  Rotate Instructions.
9/20/6Lecture 3 - Instruction Set - Al Instruction Set (2)
ECE 265 – LECTURE 8 The M68HC11 Basic Instruction Set The remaining instructions 10/20/ ECE265.
Microprocessor Dr. Rabie A. Ramadan Al-Azhar University Lecture 7.
Microprocessors Monday, Apr. 13 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University.
Chapter 10 The Assembly Process. What Assemblers Do Translates assembly language into machine code. Assigns addresses to all symbolic labels (variables.
ECE 447: Lecture 12 Logic, Arithmetic, Data Test and Control Instructions of MC68HC11.
ECE 265 – LECTURE 5 The M68HC11 Basic Instruction Set 12/8/ ECE265.
George W. Woodruff School of Mechanical Engineering, Georgia Tech ME4447/6405 ME 4447/6405 Microprocessor Control of Manufacturing Systems and Introduction.
1 Introduction to Microcontroller Microcontroller Fundamentals & Programming.
1 Microcontroller Fundamentals & Programming Addressing Modes.
Microcontroller Fundamentals & Programming Arithmetic Instructions.
Arithmetic and Logic Instructions
Advanced Assembly Language Programming
CDA 3101 Spring 2016 Introduction to Computer Organization
ECE 447: Lecture 11 Introduction to Programming in Assembly Language.
Chapter 7 Bit Manipulation. 7.1 Logical Operations.
Instruction Sets. Instruction set It is a list of all instructions that a processor can execute. It is a list of all instructions that a processor can.
Microprocessor & Assembly Language Arithmetic and logical Instructions.
Embedded Systems Lecture 5 January 25 th, 2016.
Integer Operations Computer Organization and Assembly Language: Module 5.
Microprocessor & Assembly Language
EE345 Chapter 2 Lecture 3 April Instruction and addressing modes 1.Extended Addressing 2.Direct Addressing 3.Inherent Addressing 4.Immediate Addressing.
The 68HC11 Microcontroller Minnesota State University, Mankato
CPU12 Instruction Set Overview
Unit 1 Instruction set M.Brindha AP/EIE
Addressing Modes in Microprocessors
ECE 3430 – Intro to Microcomputer Systems
HC11 Programming.
Assembly Language Programming of 8085
ECE 3430 – Intro to Microcomputer Systems
Microprocessor T. Y. B. Sc..
3.Instruction Set of 8085 Consists of 74 operation codes, e.g. MOV
ECE 3430 – Intro to Microcomputer Systems
ECE 3430 – Intro to Microcomputer Systems
ECE 3430 – Intro to Microcomputer Systems
Introduction to 8085 Instructions
Microcomputer Programming
68000 Arithmetic Instructions
Arithmetic operations Programming
Microprocessor and Assembly Language
ECE 3430 – Intro to Microcomputer Systems
ME 4447/6405 Microprocessor Control of Manufacturing Systems and
Shift & Rotate Instructions)
Arithmetic and Logic Chapter 5
ME 4447/6405 Microprocessor Control of Manufacturing Systems and
ME 4447/6405 Microprocessor Control of Manufacturing Systems and
Chapter 5 Arithmetic and Logic Instructions
Presentation transcript:

Revised: Aug 1, EE4390 Microprocessors Lesson 6,7 Instruction Set, Branch Instructions, Assembler Directives

Revised: Aug 1, HC12 Instruction Set An instruction set is defined as a set of instructions that a microprocessor understands to execute 68HC12 has 209 instructions –group instructions into 7 basic categories

Revised: Aug 1, HC12 Instruction Set (cont) Data transfer and manipulation Arithmetic - add, subtract, multiply, divide Logic and bit instructions Data test instructions Branch Instructions Function Call Instructions Fuzzy Logic Instructions

Revised: Aug 1, Data Transfer and Manipulation Instructions Load instruction: copies contents of specified location to specified accumulator or index register Affect changes to N and Z bit of CCR Reference Appx A LabelOp-CodeOperand(s) Comment LDAA#$12; LDS#$DFFF;

Revised: Aug 1, Data Transfer and Manipulation Instructions (cont) Store instruction: copies contents of specified accumulator or register to specified memory location LabelOp-CodeOperand(s) Comment STAB$1237; STD$CFFF;

Revised: Aug 1, Data Transfer and Manipulation Instructions (cont) Transfer instructions: copies the contents of one CPU register to another The N, Z, and V flags of the CCR are not affected LabelOp-Code Operand(s) Comment TBA;transfer B to A TAB;transfer A to B MOVB $1234,$CF0D;byte mem-to-mem source->destination MOVW $1234,$CF0D;word mem-to-mem TFR A,B;transfer reg to reg source->destination

Revised: Aug 1, Rotate and Shift Operations 21 different rotate and shift operations Logical Shift –allows each bit to be studied by examining carry bit –shifts in specified direction –discards bit, brings in 0 Arithmetic Shift –used for arithmetic multiplication and division –preserves sign bit Rotate –rotates bit positions within byte

Revised: Aug 1, Rotate and Shift Operations (cont)

Revised: Aug 1, Rotate and Shift Operations (cont) LabelOp-Code Operand(s) Comment ROL $1234; RORA LSLD ASL $2345 ASRB

Revised: Aug 1, Arithmetic Operations Addition - 8 different instructions LabelOp-Code Operand(s) Comment ABA;A+B->B ADDB$1234;B + [$1234]->B Subtraction - LabelOp-Code Operand(s) Comment SBA;A-B -> A SUBB$1234;B - [$1234]->B

Revised: Aug 1, Arithmetic Operations (cont) Multiplication - 4 different instructions, integer numbers –MUL: multiply two 8-bit numbers in accumulator A and B and store the result in D –EMUL: extended multiply: multiply two 16-bit numbers in index register Y and D. The 32-bit result stored in Y and D –EMULS: same operation as EMUL with signed numbers LabelOp-Code Operand(s) Comment LDAA#$10 LDAB#$20 MUL;result in D

Revised: Aug 1, Arithmetic Operations (cont) Division - 5 different instructions, 16 and 32 bit arguments –IDIV: unsigned integer 16-bit division, dividend in D, divisor in X, quotient in X and remainder in D –IDIVS: signed integer 16-bit division, dividend in D, divisor in X, quotient in X and remainder in D –FDIV: unsigned fractional 16-bit division –EDIV: unsigned integer division, 32-bit dividend, 16-bit divisor –EDIVS: signed integer division, 32-bit dividend, 16-bit divisor LabelOp-Code Operand(s) Comment LDD#$0010 LDX#$0020 FDIV

Revised: Aug 1, Logical Operations AND: performs bit-by-bit AND operation LabelOp-Code Operand Comment ANDA $1234;A * M -> A BITA;A * M (sets CCR) OR: bit-by-bit OR operation EXOR: bit-by-bit EXOR operation

Revised: Aug 1, Complement Instructions NEGA: performs two’s complement of A NEGB: performs two’s complement of B COMA: performs one’s complement of A COMB: performs one’s complement of B

Revised: Aug 1, BIT Manipulation Instructions Four different BIT manipulation instructions: –BCLR: Bit Clear ;(M) * (mm) -> M –BSET: Bit Set ;(M) * (mm) -> M –Format:BSET memory location, mask EX] BSET $D000, % ;mask specified as binary –BRCLR: Branch if bit(s) specified by a mask are Clear –BRSET: Branch if bit(s) specified by a mask are set –Format: BRCLR memory location, mask, branch addr EX] BRCLR $D000, % , done ;note use of label : done:

Revised: Aug 1, Data Test Instructions Compares and Tests 10 test instructions, affect the CCR bits, usually followed by Branch instruction Compare: subtracts value from specified register and sets flags (N, Z, V, and C) –CMPA, CMPB, CBA, CPD, CPS, CPX, CPY –No effect on arguments Test: subtracts zero from specified register and sets flags (N,Z) –TST, TSTA, TSTB –No effects on arguments

Revised: Aug 1, Branch Instructions Can alter execution order of instructions Two types: –unconditional: BRA, JMP –conditional: Bxx relative-address xx specifies which CCR flag is tested precede branch instruction with test instruction to insure flags in CCR current “higher” and “lower” for unsigned numbers “greater” and “less” for signed numbers

Revised: Aug 1, Directives ImageCraft ICC12 assembler/compiler.area (abs) data and instructions belong to an area with the specifed name, “(abs)” allows section to contain.org statements.org change the program counter to the address specified _main:: indicates beginning of program = used to equate name with numerical value OPTION = $1039 ;link register name to memory addr OPT_MASK = $80 ;use convenient name for register contents LDAA #OPT_MASK STAA OPTION