Principles of Computer Engineering: Lecture 8: Basic TTL Logic Circuits

Introduction Digital Electronics Logic Gates De Morgan’s Theorem Summary Lab Experiment

Analogue vs. Digital Analogue signal- one whose output varies continuously in step with the input. Example: Analog Digital signal- one whose output varies at discrete voltage levels commonly called HIGH or LOW (1 or 0). Example: Digital HIGH or 1 LOW or 0 Time

Why Digital? Data can be stored (memory characteristic of digital). Data can be processed for error control and encryption. Compatible with display technologies. Compatible with computer technologies. Systems can be programmed. Digital IC families make design easier.

Why Analogue? Most “real-world” events are analog in nature. Analogue processing is usually simpler. Analogue processing is usually faster. Traditional electronic systems were mostly analogue in nature.

Defining Logic Levels CAUTION: Logic devices interpret input voltages as either HIGH or LOW. TTL or CMOS IC families have their unique voltage profiles. TTl: +5V, CMOS: +12V, +9V or +5V. TTL Family of ICs CMOS Family of ICs HIGH HIGH 100% 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% Voltage CAUTION: Input voltages in the UNDEFINED region may yield unpredictable results. Undefined Undefined LOW LOW

Digital Logic Circuits Digital logic circuits are very useful for decision processes of many everyday electronic devices Calculators, Telephone Exchanges, Lifts, Domestic Appliances etc. The simplest form of digital logic gates have two inputs and one output (though other types do exist) They can be based on so-called Transistor-Transistor Logic (TTL) or Complimentary Metal Oxide Semiconductor (CMOS) technology We will be using TTL types – one must not mix TTL & CMOS TTL defines logic 0 to be equal to 0V (<0.8V) and logic 1 to be equal to 5V (>2.0V) and uses a 5V supply voltage Problem:  What are some of the differences between CMOS and TTL signals and how do they compare? Solution:  Characteristics of CMOS logic: Dissipates low power: The power dissipation is dependent on the power supply voltage, frequency, output load, and input rise time. At 1 MHz and 50 pF load, the power dissipation is typically 10 nW per gate. Short propagation delays: Depending on the power supply, the propagation delays are usually around 25 nS to 50 nS. Rise and fall times are controlled: The rise and falls are usually ramps instead of step functions, and they are 20 - 40% longer than the propagation delays. Noise immunity approaches 50% or 45% of the full logic swing. Levels of the logic signal will be essentially equal to the power supplied since the input impedance is so high. Voltage levels range from 0 to VDD where VDD is the supply voltage. A low level is anywhere between 0 and 1/3 VDD while a high level is between 2/3 VDD and VDD. Characteristics of TTL logic: Power dissipation is usually 10 mW per gate. Propagation delays are 10 nS when driving a 15 pF/400 ohm load. Voltage levels range from 0 to Vcc where Vcc is typically 4.75V - 5.25V. Voltage range 0V - 0.8V creates logic level 0. Voltage range 2V - Vcc creates logic level 1. CMOS compared to TTL: CMOS components are typically more expensive than TTL equivalents. However, CMOS technology is usually less expensive on a system level due to CMOS chips being smaller and requiring less regulation. CMOS circuits do not draw as much power as TTL circuits while at rest. However, CMOS power consumption increases faster with higher clock speeds than TTL does. Lower current draw requires less power supply distribution, therefore causing a simpler and cheaper design. Due to longer rise and fall times, the transmission of digital signals becomes simpler and less expensive with CMOS chips. CMOS components are more susceptible to damage from electrostatic discharge than TTL components.

Different Logic Operators There are only a few types of basic logic operators AND, OR, NAND, NOR, NOT, XOR and XNOR Each type has a specific circuit symbol (we shall see these later) The operation of each device is described by its “truth-table” Many devices can have more than two inputs but we will only consider two input devices in this module The operations of the logic devices can be expressed mathematically using “Boolean Algebra” Sometimes logic circuits are referred to as “gates” We will see each gate in turn…

AND Gate An “AND” gate has the following symbol and truth-table It can be expressed using the following Boolean algebra Sometimes you might see Q = A & B or the gate symbol may contain an “&” (ampersand) A B Q 1

NAND Gate A “NAND” gate has the following symbol and truth-table It can be expressed using the following Boolean algebra NOTE: A B Q 1

OR Gate An “OR” gate has the following symbol and truth-table It can be expressed using the following Boolean algebra A B Q 1

NOR Gate A “NOR” gate has the following symbol and truth-table It can be expressed using the following Boolean algebra NOTE: A B Q 1

NOT Gate A “NOT” gate has the following symbol and truth-table It can be expressed using the following Boolean algebra A NOT gate is sometimes referred to as an “inverter” “Schmitt Triggers” are specialised inverters with hysteresis A Q 1

XOR Gate An “XOR” gate has the following symbol and truth-table It can be expressed using the following Boolean algebra NOTE: A B Q 1

De Morgan’s Theorem De Morgan’s Theorem (or Law) states that a special relationship exists between NOR and NAND operations such that A B A+B 1

NAND and NOR Gates It is a useful fact that all other types of logic functions can be created from combinations of NAND gates or NOR gates Hence the NAND gate is the most commonly used gate In today’s experiment, you will be making other gate functions using only NAND gates

Summary Basic Logic Gates TTL vs. CMOS Typical Gate Functions Boolean Algebra De Morgan’s Theorem Questions?

Principles of Computer Engineering: Lab Experiment 9: Basic TTL Logic

Introduction Introduction to TTL logic gates Use LEDs to indicate logic level Need to drive LEDs with inverters (NOT gates) Test four different combinations of NAND gates Extra “mystery” circuit to build and test Summary

TTL Logic Inputs The figure opposite shows how to use resistors to apply logic 1 or logic 0 to standard TTL gate inputs The 10kW resistor is acting as a pull- up resistor – when the switch closes the input voltage = 0V The 470W resistor as a pull-down resistor – when the switch closes the input voltage = 5V Logic 0 is defined as < 0.8V and Logic 1 as > 2.0 V Important to be aware of losses + 1KΩ

Experiment Part 1: LED Indicators Most TTL logic gates are “open collector” devices This means that they cannot provide any source current They can only sink current Therefore to drive an LED we must use inverse logic This means that logic 0 will activate the LED and logic 1 will deactivate it Hence, we use inverters to drive the LEDs to give true logic (make 3-off) +

74LS04 (Hex NOT gate) A Q LED 1 Off On

Experiment: Part 2 Each circuit has two inputs and one output Use LED indicator circuits to show logic levels +

74LS00 (Hex NAND gate)

Experiment: Part 2 There are four circuits to build and test Note down results in your logbooks + A B Q 1

Experiment: Part 3 Use NAND gates to realise the following Boolean equation Verify correct operation by extracting a Boolean expression from the truth table – it should match the function specified You should be able to build this system using two 7400 ICs (a maximum of 8 gates) This can be accomplished by removing redundant gates from the circuit at the design stage Can you recognise the Boolean operation of the circuit?

Summary Build and test three LED indicator circuits using 74LS04 inverters Build and test the four circuits based on NAND gates Build and test the third “mystery” circuit based on NAND gates Any questions?