P4: specifying data planes

Slides:



Advertisements
Similar presentations
Programming Protocol-Independent Packet Processors
Advertisements

P4 demo: a basic L2/L3 switch in 170 LOC
How to tell your plumbing what to do Protocol Independent Forwarding
ENGINEERING WORKSHOP Compute Engineering Workshop P4: specifying data planes Mihai Budiu San Jose, March 11, 2015.
Evolution Series Edge Release R3A00 Bridging Societies.
NetFPGA Project: 4-Port Layer 2/3 Switch Ankur Singla Gene Juknevicius
Forwarding Metamorphosis: Fast Programmable Match-Action Processing in Hardware for SDN Pat Bosshart, Glen Gibb, Hun-Seok Kim, George Varghese, Nick.
Introduction to IPv6 Presented by: Minal Mishra. Agenda IP Network Addressing IP Network Addressing Classful IP addressing Classful IP addressing Techniques.
Introduction into VXLAN Russian IPv6 day June 6 th, 2012 Frank Laforsch Systems Engineer, EMEA
CS 457 – Lecture 16 Global Internet - BGP Spring 2012.
OpenFlow overview Joint Techs Baton Rouge. Classic Ethernet Originally a true broadcast medium Each end-system network interface card (NIC) received every.
OpenFlow Switch Specification-v part1 Speaker: Hsuan-Ling Weng Date: 2014/12/02.
Introducing MPLS Labels and Label Stacks
ECE 526 – Network Processing Systems Design Packet Processing II: algorithms and data structures Chapter 5: D. E. Comer.
Chapter 9 Classification And Forwarding. Outline.
Chapter 4 Queuing, Datagrams, and Addressing
© 2006 Cisco Systems, Inc. All rights reserved. MPLS v2.2—1-1 MPLS Concepts Introducing Basic MPLS Concepts.
Paper Review Building a Robust Software-based Router Using Network Processors.
Jon Turner, John DeHart, Fred Kuhns Computer Science & Engineering Washington University Wide Area OpenFlow Demonstration.
IP Forwarding.
Router Architecture Overview
EECB 473 DATA NETWORK ARCHITECTURE AND ELECTRONICS PREPARED BY JEHANA ERMY JAMALUDDIN Basic Packet Processing: Algorithms and Data Structures.
Traffic Management - OpenFlow Switch on the NetFPGA platform Chun-Jen Chung( ) Sriram Gopinath( )
Transport Layer3-1 Chapter 4: Network Layer r 4. 1 Introduction r 4.2 Virtual circuit and datagram networks r 4.3 What’s inside a router r 4.4 IP: Internet.
Michael Wilson Block Design Review: Line Card Key Extract (Ingress and Egress)
MPLS Concepts Introducing Basic MPLS Concepts. Outline Overview What Are the Foundations of Traditional IP Routing? Basic MPLS Features Benefits of MPLS.
Arbitrary Packet Matching in Openflow
P. Bosshart, D. Daly, G. Gibb, M. Izzard, N. McKeown, J. Rexford, C. Schlesinger, D. Talayco, A. Vahdat, G. Varghese, D. Walker SIGCOMM CCR, 2014 Presented.
OpenFlow MPLS and the Open Source Label Switched Router Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan,
Introduction to Mininet, Open vSwitch, and POX
David M. Zar Block Design Review: PlanetLab Line Card Header Format.
Why Fabric? 1 Complicated technology/vendor/device specific provisioning for networks, especially heterogeneous network DC Network – STP, TRILL, SPB, VXLAN,
PISCES: A Programmable, Protocol-Independent Software Switch
Network Layer session 1 TELE3118: Network Technologies Week 5: Network Layer Forwarding, Features Some slides have been taken from: r Computer.
Graciela Perera Department of Computer Science and Information Systems Slide 1 of 18 INTRODUCTION NETWORKING CONCEPTS AND ADMINISTRATION CSIS 3723 Graciela.
InterVLAN Routing 1. InterVLAN Routing 2. Multilayer Switching.
P4: Programming Protocol-Independent Packet Processors
COS 561: Advanced Computer Networks
P4: specifying data planes
Programmable switches
Chapter 4 Network Layer Computer Networking: A Top Down Approach 6th edition Jim Kurose, Keith Ross Addison-Wesley March 2012 CPSC 335 Data Communication.
Some slides have been adapted from:
The architecture of the P416 compiler
Muhammad Shahbaz Nick Feamster Jennifer Rexford Sean Choi Nick McKeown
P4 (Programming Protocol-independent Packet Processors)
Data Center Networks and Fast and Programmable Switching Technologies
Network Data Plane Part 2
April 28, 2017 SUMIT MAHESHWARI INES UGALDE
PISCES: A Programmable, Protocol-Independent Software Switch
SDN Overview for UCAR IT meeting 19-March-2014
Design of a Diversified Router: TCAM Usage
Design of a Diversified Router: Packet Formats
Programmable Networks
DC.p4: Programming the forwarding plane of a datacenter switch
Some slides have been taken from:
Design of a Diversified Router: November 2006 Demonstration Plans
Code Review for IPv4 Metarouter Header Format
Code Review for IPv4 Metarouter Header Format
Debugging P4 Programs with Vera
Reprogrammable packet processing pipeline
P4FPGA : A Rapid Prototyping Framework for P4
Programmable Networks
Design of a High Performance PlanetLab Node: Line Card
Linux Network Programming with P4
Network Layer: Control/data plane, addressing, routers
Programmable Switches
Project proposal: Questions to answer
Packet processing with P4 and eBPF
P4C-XDP: Programming the Linux Kernel Forwarding Plane using P4
Chapter 4: outline 4.1 Overview of Network layer data plane
Presentation transcript:

P4: specifying data planes http://P4.org netdev0.1 Ottawa, February 15, 2015 The P4 language is still evolving. Mihai Budiu

P4 Language Consortium “Open for participation by any individual or corporation” http://p4.org Language spec v1.0.1 Coming soon (3/2015): FOSS release of a reference P4 implementation

What do we want to achieve? Switch Your own protocols Standard protocols Datacenter Currently most useful if you have your own network playground P4 will make it possible to roll out new protocols and features (and remove old protocols too). Today this is mostly useful within closed networks, e.g. datacenters, but this mechanism will accelerate protocol evolution and it may become applicable to broader ecosystems.

Benefits Implement (new) protocols Low overhead (high speed) VxLAN: 175 lines of code NVGRE: 183 lines of code Low overhead (high speed) Flexible forwarding policies Improved signaling, monitoring, and troubleshooting Change functionality with software upgrades Use only what you need P4 should enable all of these, without sacrificing performance. We want to be able to achieve Tbps switching speeds in programmable switches.

P4 Scope Control plane Traditional switch Data plane Control plane Table mgmt Traditional switch Control traffic Data plane Packets P4 Program This is the P4 interface, a new interface between the control-plane and the data plane. The data plane performs mostly stateless high-speed processing. The data plane is lean and fast; most of the complexity is still in the control plane. P4 does not address this aspect. Control plane P4 table mgmt P4-defined switch Data plane

Q: Which data plane? A: Any data plane! Programmable switches FPGA switches Programmable NICs Software switches You name it… Control plane Data plane P4 should be portable across a large spectrum of switch implementations.

Data plane programmability Programmable blocks Data plane P4 P4 P4 P4 expresses the behavior of significant data plane functions. It currently is not rich enough to describe the complete functionality of the data plane. Fixed function

How does it work? Programmable parser eth vlan ipv4 Headers Payload Packet (byte[]) Queueing Programmable match-action units eth ipv4 port mtag err bcast How is packet processing performed in P4? This is a high-level view. Metadata Headers Programmable reassembly eth mtag ipv4 Packet

P4 language State-machine; bitfield extraction Programmable parser State-machine; bitfield extraction Table lookup and update; bitfield manipulation; control flow Programmable match-action units The P4 language has elements corresponding to the previously-described function blocks: parsing, match/action, and reassembly. Programmable reassembly Bitfield assembly No: memory (pointers), loops, recursion, floating point

Parsing = State machines header_type ethernet_t { fields { dstAddr : 48; srcAddr : 48; etherType : 16; } parser parse_ethernet { extract(ethernet); return select(latest.etherType) { 0x8100 : parse_vlan; 0x800 : parse_ipv4; 0x86DD : parse_ipv6; } TCP New IPv4 IPv6 VLAN Eth The parser is essentially a state-machine driven by the packet header. It extracts packet fields into general-purpose registers (“metadata”).

Match Lookup key  table ipv4_lpm { reads { ipv4.dstAddr : lpm; } actions { set_next_hop; drop; Lookup key dstAddr action 0.* drop 10.0.0.* set_next_hop 224.* 192.168.* 10.0.1.* The Match performs table lookups based on metadata. The table contents is managed by the control plane.

Actions action set_nhop(nhop_ipv4_addr, port) { modify_field(metadata.nhop_ipv4_addr, nhop_ipv4_addr); modify_field(standard_metadata.egress_port, port); add_to_field(ipv4.ttl, -1); } dstAddr action 0.* drop 10.0.0.* set_next_hop 224.* 192.168.* 10.0.1.* Actions are code fragments that manipulate metadata. They are driven by information obtained from table look-ups. nhop_ipv4_addr port 10.0.0.10 1 10.0.1.10 2

Control-Flow M/A control ingress { apply(port); if (valid(vlan_tag[0])) { apply(port_vlan); } apply (bridge_domain); if (valid(mpls_bos)) { apply(mpls_label); retrieve_tunnel_vni(); if (valid(vxlan) or valid(genv) or valid(nvgre)) { apply(dest_vtep); apply(src_vtep); M/A M/A M/A P4 supports conditional forward-only control-flow. M/A

Reassembly Driven by header types add_header(ipv6); remove_header(vlan);

Table contents management Control plane Manage tables contents (Tied to P4 program) Data plane Table contents is uploaded into the data plane by the control plane.

P4 Summary Simple language Efficient execution (high speed switching) Parsing, bit-field manipulation, table lookup, control flow, packet reassembly Efficient execution (high speed switching) Simple cost model Abstract resources Portable Expressive: New protocols, forwarding policies, monitoring and instrumentation We will release the first version of the language soon. We are actively working on an improved version which fixed some shortcomings – which we plan to release as well.

Creating a Programming Language Interface in a place where there wasn’t one. Control plane The P4 Programming- Language Interface Data plane