12/21/98 -1 Seminar Productieautomatisering 2000+Gerrit Muller Specification and design of a complex system: The ASML waferstepper Gerrit Muller Delft Seminar Productieautomatisering 2000+

12/21/98 -2 Seminar Productieautomatisering 2000+Gerrit Muller The Market PC’s non PC computing consumer electronics communicationsother applications IC’smemory other semiconductors equipment 32%16%17%18%17% semiconductor sales by end-use rmarket source: Dataquest, ING Barings research ASML sales 1997: 1.8 Gfl net income:0.3 Gfl steppers GDP T$39.4 T$ electronic sales semiconductor sales 902.4G$1284.2G$ 151.7G$330.6G$ Equipment sales 22.3G$42.8G$ Steppers3.6G$7.3G$ 17%26% 15% 16% 13% 17% 3%

12/21/98 -3 Seminar Productieautomatisering 2000+Gerrit Muller What is a waferstepper? Lightsource Mask (Reticle) Lens Wafer Die

12/21/98 -4 Seminar Productieautomatisering 2000+Gerrit Muller Step & Scan technology Slit reticle wafer Lens Scanning fieldsize Stepping fieldsize 250 mm/s Lens

12/21/98 -5 Seminar Productieautomatisering 2000+Gerrit Muller Main specifications ImagingOverlay Productivity linewidth:180 nm (1999) critical dimension control AA (single machine)40 nm BC (matched)60 nm 96 Wafers per hour For comparison:Wafer diameter 200 mm Die size ca.: 20*20 mm 2

12/21/98 -6 Seminar Productieautomatisering 2000+Gerrit Muller Products Steppers 5500 Scanners 300 mm, high throughput Non opto i-line 248nm i-line 193nm

12/21/98 -7 Seminar Productieautomatisering 2000+Gerrit Muller Product roadmap /250C i-line stepper /300C DUV stepper /500 DUV scanner /400 i-line scanner / nm scanner /700 DUV scanner S700 DUV scannerT700 DUV scanner T nm scanner 5500 stepper body 5500 scanner body Atlas 300 mm body Athena/TIS Quadrupole 2 kHz laser S400 I-line scannerT400 I-line scanner /300D

12/21/98 -8 Seminar Productieautomatisering 2000+Gerrit Muller Mechanical Design dynamic performance stage technology servo technology cooperation with Philips CFT, NatLab design rule: 10 nm-> 1 nm -> subnanometer

12/21/98 -9 Seminar Productieautomatisering 2000+Gerrit Muller Example dynamic performance 6 degrees of freedom: x, y, Rz z, Rx, Ry v = 250 mm/s a = 10 m/s 2 control frequency: 4 kHz (250  sec) position measerument by interferometers many cables

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Optics design Projection design Illumination Light source (lasers) Intensity, abberations, distortion, stray light, uniformity cooperation with Zeiss, Cymer 365 nm -> 248 nm -> 193 nm (-> 157 nm?) extensive modelling and simulation

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Example projection design ca 12 lens elements temperature and pressure controlled anti reflection coatings 193 nm CaF 1 m.

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Control architecture Functions implemented in software: Calibration, Preparation, Expose, Batch control Electronics infrastructure Integration

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Modular subsystems illuminatorlight source reticle stage lens wafer stage base frame reticle handling wafer handling contamination and temperature control electronics cabinets UI console measurement

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller System engineering mechanicsopticscontrolmeasurementcontamination & temperature imaging overlay productivity

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Overlay budget Process Overlay 80 nm Reticle 15 nm Matched Machine 60 nm Process dependency sensor 5 nm Single Machine 30 nm Lens Matching 25 nm Matching Accuracy 5 nm Stage overlay 12 nm Global alignment accuracy 6 nm Stage grid accuracy 5 nm Metrology stability 6 nm Position accuracy 7 nm alignment repro 5 nm Interferometer stability 1 nm Frame stability 2.5 nm tracking error phi 75 nrad tracking error X, Y 2.5 nm Off axis pos meas accuracy 4 nm Stage Al. pos. meas. accuracy 4 nm System adjustment accuracy 2 nm Off axis Sensor repro 3 nm Blue align sensor repro 3 nm tracking error WS 2 nm tracking error RS 1 nm

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Development phases sps plan cost, effort,time prs eps eds integration plan tps 123  40 feasibilitydefinitionsystem designintegrationfield monitoring tpd alfa test TAR prototype tps subsystem specsubsystem design engineeringverification sds beta test TAR business impact

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller SPS contents checklist performance requirements imaging overlay throughput overview doc tree, structure functional requirements draft functional model (extern) draft product lifecycle option structure draft machine requirements design constraints, f.i. robustness safety reliability COG, COO interoperability operations requirements draft serviceability manufacturability option structure environment requirements wafer, reticles power, gases, water, etc. weight size transport functional requirements functional model (extern) factory integration user interface operations requirements serviceability manufacturability 1230 feasibilitydefinitionsystem designsubsystem specengineeringsubsystem design

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller SDS contents checklist decomposition in subsystems draft performance budgets draft functional model (design) draft overview control architecture costprice budget draft consumable budget draft diagnostic analysis safety design accessability set up sequence tolerance budget cycle time budget mechanical layout budgets draft SW architecture draft Electrical architecture handling interfaces power, gas, water, etc budgets draft doc tree, structure draft doc tree, structure overview draft decomposition in subsystems performance budgets functional model (design) concept functional model (design) function allocation draftfunction allocation concept function allocation control architecturedraft SW architecture mechanical layout budgets power, gas, water, etc budgets safety analysis reliability/uptime budget draft reliability/uptime budget costprice budget consumable budget 1230 feasibilitydefinitionsystem designsubsystem specengineeringsubsystem design diagnostic design interoperability design transport design

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Definitions PRSProduct Requirement SpecificationWhat should the product be Marketing SPSSystem Performance SpecificationWhat will the product be SE SDSSystem Design SpecificationHow will it be made SE TPSTest Performance SpecificationWhat and how will it be tested SE TARTest Acceptance ReportTestresultSE EPSElement Performance SpecificationWhatD&E EDSElement Design SpecificationHowD&E TPSTest Performance Specification What and how will it be tested D&E TARTest Acceptance ReportTestresultD&E EPS, EDS, TPS are recursively applied from subsystem level to monodisciplinary module level

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Concurrent engineering, Integration subsystem1 design subsystem2 design Subsystem n design dynamical performance imaging overlay metrology levelling Integration prototypes Final integration Concurrent engineering

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Moore’s law (or challenge?) roadmap 1997 roadmap 1998 revision 1999 proposal leading edge customers SIA linewidth in nm.

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller roadmap SIA leading edge customers Rule of thumb: Process overlay = linewidth / 3 overlay 80 overlay

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Overlay budget Process Overlay 80 nm Reticle 15 nm Matched Machine 60 nm Process dependency sensor 5 nm Single Machine 30 nm Lens Matching 25 nm Matching Accuracy 5 nm Stage overlay 12 nm Global alignment accuracy 6 nm Stage grid accuracy 5 nm Metrology stability 6 nm Position accuracy 7 nm alignment repro 5 nm Interferometer stability 1 nm Frame stability 2.5 nm tracking error phi 75 nrad tracking error X, Y 2.5 nm Off axis pos meas accuracy 4 nm Stage Al. pos. meas. accuracy 4 nm System adjustment accuracy 2 nm Off axis Sensor repro 3 nm Blue align sensor repro 3 nm tracking error WS 2 nm tracking error RS 1 nm 2003: 35 nm Dramatic increase of complexity!

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Summary ASML developement strategy Concurrent engineering short development cycle time Networking market technology base flexibility System engineering modularity short integration Family concept upgradeability follow SIA roadmap reuse, risk reduction over generations

12/21/ Seminar Productieautomatisering 2000+Gerrit Muller Stellingen Multi disciplanary design process and skills required Most unforeseens show up during integration: – force integration start as early as possible – integration is always underestimated Manage the design and integration by a few key parameters, – however watch out for sub - optimization