Branch & Call Chapter 4 Sepehr Naimi www.NicerLand.com

Topics Introduction to branch and call Branch Call Time Delay LR Calling a function Time Delay

Branch and Call CPU executes instructions one after another. For example in the following C program, CPU first executes the instruction of line 3 (adds b and c), then executes the instruction of line 4. 1 2 3 4 5 6 void main () { a = b + c; c -= 2; d = a + c; }

Branch and Call (Continued) But sometimes we need the CPU to execute, an instruction other than the next instruction. For example: When we use a conditional instruction (if) When we make a loop When we call a function

Branch and Call (Continued) Example 1: Not executing the next instruction, because of condition. In the following example, the instruction of line 6 is not executed. 1 2 3 4 5 6 7 8 9 void main () { int a = 2; int c = 3; if (a == 8) c = 6; else c = 7; c = a + 3; }

Branch and Call (Continued) Example 2: In this example the next instruction will not be executed because of loop. In the following example, the order of execution is as follows: Line 4 Line 5 Again, line 4 Again line 5 Line 6 1 2 3 4 5 6 7 8 9 void main () { int a, c = 0; for(a = 2; a < 4; a++) c += a; a = c + 2; }

Branch and Call (Continued) Example 3: Not executing the next instruction, because of calling a function. In the following example, the instruction of line 6 is not executed after line 5. Code 1 2 3 4 5 6 7 8 9 10 11 void func1 (); void main () { int a = 2, c = 3; func1 (); c = a + 3; } void func1 (){ int d = 5 / 2;

Branch and Call (Continued) In the assembly language, there are 2 groups of instructions that make the CPU execute an instruction other than the next instruction. The instructions are: Branch: used for making loop and condition Call: used for making function calls

Branch Branch changes the Program Counter (PC) and causes the CPU to execute an instruction other than the next instruction.

Branch in ARM There are 2 branch instructions in ARM: B and BX. We label the location where we want to jump, using a unique name followed by ‘:’ in GNU Then, in front of the branch instruction we mention the name of the label. This causes the CPU to jump to the location we have labeled, instead of executing the next instruction. Code 1 2 3 4 5 MOV R1, #0 MOV R2, #2 L1 ADD R1, R1, R2 B L1 SUB R10,R1,R5 L1: L1

Ways of specifying the branch target B and BX provide the branch address using 2 different ways: B operand PC = PC + (operand*4) BX Rn PC = Rn register

1110 1010 XXXX XXXX XXXX XXXX XXXX XXXX B (Branch) B PC = PC + (operand×4) To execute B: The operand shifts left twice and then it is added to the current value of PC. Example: Operand = 000000000111 PC = PC + 0000000011100 1110 1010 XXXX XXXX XXXX XXXX XXXX XXXX 1110 1010 0000 0000 0000 0000 0000 0111

B instruction To execute B: The operand shifts left twice and then it is added to the current value of PC. PC: 0000000C 00000010 0000001C 00000020 00000008 Address Code + + 0000 0004 0008 000C 0010 0014 0018 001C 0020 .global _start _start: MOV R1,#0x15 MOV R7, #5 B LBL_NAME MOV R8, #4 ADD R8, R8, R7 LBL_NAME: ADD R6, R6, R7 00000014 00000014 Machine code: opCode operand EA000001 Shift left twice 00000004 0014 Machine code: opCode operand EAFFFFFE FFFFFFF8

The Program counter is loaded with the contents of Rn register. BX BX Rn PC = Rn The Program counter is loaded with the contents of Rn register. For example, if R5 points to location 100, by executing BX R5, the CPU jumps to location 100. E12FFF1n BX R3 E12FFF13

BX instruction The value of a register is loaded to the PC. To execute BX: The value of a register is loaded to the PC. PC: PC: 0000000C 00000010 00000008 Address Code 0000 0004 0008 000C 0010 0014 0018 001C 0020 .global _start _start: MOV R1,#0x15 LDR R7, =LBL1 BX R7 MOV R8, #4 ADD R8, R8, R7 LBL1: ADD R6, R6, R7 B LBL_NAME R7: 00000014 00000000 00000014 Machine code: E12FFF17 opCode operand 0014 Machine code: opCode operand EAFFFFFE

Conditional Jump in ARM CPSR: Negative oVerflow Zero carry The conditional jump instructions in ARM are as follows: Instruction Abbreviation of Comment BEQ lbl Branch if Equal Jump to location lbl if Z = 1, BNE lbl Branch if Not Equal Jump if Z = 0, to location lbl BCS lbl BHS lbl Branch if Carry Set Branch if Same or Higher Jump to location lbl, if C = 1 BCC lbl BLO lbl Branch if Carry Cleared Branch if Lower Jump to location lbl, if C = 0 BMI lbl Branch if Minus Jump to location lbl, if N = 1 BPL lbl Branch if Plus Jump if N = 0 BGE lbl Branch if Greater or Equal Jump if N = V BLTlbl Branch if Less Than Jump if N <> V BLElbl Branch if Less or Equal Jump if Z = 1 or N <> V BGT lbl Branch if Greater Jump if Z = 0 and N = V

Conditional vs. Unconditional There are 2 kinds of Branch Unconditional Branch: When CPU executes an unconditional branch, it jumps unconditionally (without checking any condition) to the target location. Example: BX and B instructions Conditional Branch: When CPU executes a conditional branch, it checks a condition, if the condition is true then it jumps to the target location; otherwise, it executes the next instruction.

Usages of Conditional jump Conditions Loop

Conditions When b is subtracted from a: The result is zero, when a is equal to b Carry will be set when a >= b a - b

Example 1 Write a program that if R0 is equal to R1 then R2 increases. Solution: SUB R0,R0,R1 @Z will be set if R0 == R1 BNE NEXT @if Not Equal jump to next ADD R2,R2,#1 NEXT:

Example 2 Write a program that if R6 < R4 then R2 increases. Solution: SUB R6,R6,R4 @C will be set when R6 >= R4 BCS L1 @if Carry cleared jump to L1 ADD R2,R2,#1 L1:

Example 3 Write a program that if R6 >= R4 then R2 increases. Solution: SUB R6,R6,R4 @C will be cleared when R6 >= R4 BCC L1 @if Carry set jump to L1 INC R2 L1:

Example 4: IF and ELSE MOV R7,#5 int main ( ) { R7 = 5; if (R0 > R1) R2++; else R2--; R7++; } MOV R7,#5 SUBS R1,R1,R0 @C is set when R1 >= R0 BCS ELSE_LABEL @jump to else if cleared ADD R2,R2,#1 JMP NEXT ELSE_LABEL: SUB R2,R2,#1 NEXT: ADD R7,R7,#1

Loop Write a program that executes the instruction “ADD R3,R3,R1” 9 times. Solution: MOV R6,#9 @R6 = 9 L1: ADD R3,R3,R1 SUBS R6,R6,#1 @R6 = R6 - 1 BNE L1 @if Z = 0 L2: B L2 @Wait here forever

Loop Write a program that calculates the result of 9+8+7+…+1 Solution: MOV R6, #9 @R6 = 9 MOV R7, #0 @R7 = 0 L1: ADD R7,R7,R6 @R7 = R7 + R6 SUBS R6,R6,#1 @R6 = R6 - 1 BNE L1 @if Z = 0 L2: B L2 @Wait here forever

Loop Write a program that calculates the result of 20+19+18+17+…+1 Solution: MOV R6, #20 @R6 = 20 MOV R7, #0 @R7 = 0 L1: ADD R7,R6,R6 @R7 = R7 + R6 SUBS R6,R6,#1 @R6 = R6 - 1 BNE L1 @if Z = 0 L2: B L2 @Wait here forever

Loop for (init; condition; calculation) { do something } init init No Yes Condition No Yes Do something calculation calculation calculation calculation END END

Loop Write a program that calculates 1+3+5+…+27 Solution: MOV R0,#0 L1: ADD R0,R0,R6 ADD R6,R6,#2 ;R16 = R16 + 2 SUBS R7,R6,#27 BCC L1 ;if R6 <= 27 jump L1

CMP instruction CMP sets the flags the same way as SUBS. But does not store the result of subtraction. So, it suits for comparing. MOV R0,#0 MOV R6,#1 L1: ADD R0,R0,R6 ADD R6,R6,#2 SUBS R7,R6,#27 BCC L1 MOV R0,#0 MOV R6,#1 L1: ADD R0,R0,R6 ADD R6,R6,#2 CMP R6,#27 BCC L1

Conditional Execution in ARM in Bits Mnemonic Extension Meaning Flag 0000 EQ Equal Z = 1 0001 NE Not equal Z = 0 0010 CS/HS Carry Set/Higher or Same C = 1 0011 CC/LO Carry Clear/Lower C = 0 0100 MI Minus/Negative N = 1 0101 PL Plus N = 0 0110 VS V Set (Overflow) V = 1 0111 VC V Clear (No Overflow) V = 0 1000 HI Higher C = 1 and Z = 0 1001 HS Lower or Same C = 1 and Z = 1 1010 GE Greater than or Equal N = V 1011 LT Less than N ≠ V 1100 GT Greater than Z = 0 and N = V 1101 LE Less than or Equal Z = 0 or N ≠ V 1110 AL Always (unconditional)   1111 --- Not Valid mov r1, #10 @ r1 = 10 cmp r1, #0 @ compare r1 with 0 addne r1, r1, #10 @ this line is executed if z = 0 @ (if in the last cmp operands were not equal)

Calling a Function To execute a call: Address of the next instruction is saved in LR (R14). PC is loaded with the appropriate value Address Code 0000 0004 0008 000C 0010 0014 0018 001C 0020 .global _start _start: MOV R1, #5 MOV R2, #6 BL FUNC_NAME L1: B L1 FUNC_NAME: ADD R2,R2,R1 SUB R2,R2,#3 BX LR Machine code: 940E 0004 0004 opCode operand 00 0C LR: 000C 000C 0000 000C PC: PC: 0018 0010 0020 0024 000C 0004 + 0014

Time delay 1 T = F For F = 1GHz: 1 T = = 1 ns 1GHz Microcontroller XTAL1 T Machine cycle = 1 F XTAL XTAL2 For F = 1GHz: T Machine cycle = 1 1GHz = 1 ns

Time delay 1 5 machine cycle Delay = 5 x T = 5 x 1 ns = 5 ns MOV R6, #19 MOV R0, #95 MOV R1, #5 ADD R6, R6, R0 ADD R6, R6, R1 Delay = 5 x T = 5 x 1 ns = 5 ns machine cycle

Time delay 1 1/3 machine cycle Branch penalty MOV R6, #100 AGAIN: ADD R7,R7,R6 SUBS R6,R6,#1 BNE AGAIN *100 Branch penalty

Time delay 1 1/3 machine cycle MOV R6, #50 AGAIN: NOP NOP SUBS R6,R6,#1 BNE AGAIN *50

Time delay 1 1/3 machine cycle MOV R7, #20 L1: MOV R6, #50 L2: NOP NOP SUBS R6,R6,#1 BNE L2 SUBS R7,R7,#1 BNE L1 *20 *20 * 50