Developing a reliable communication between Blackfin and Slave device void WriteSPI(ushort value)

SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada To be tackled today Steps on the way to getting a reliable interface for writing values from Blackfin to high speed serial device Questions still unanswered 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

Questions still unanswered How do we configure the SPI interface inside the Blackfin? – Tackled last lecture How do we activate the chip-select line – PF5? – Tackled last lecture Does activating the PF5 line as SPI output control mean we have to change all the SetupPF8to11ASM( ) and other routines? – Tackled last lecture When do we activate the chip-select line, and how long for? How do we know when LCD is ready for next character – do we poll a bit and wait till ready, or can it be done in the background? How do we stop multiple commands from being accidentally sent to LCD? -- cursor move etc 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

SPI-Tests – Initialization Set_SPIregisters_ASM(ulong BAUD_SCALE) #define BAUD_SCALE 0x8000 // Make system slow so we can scope the data transfers TEST(SET_SPI_Registers, ConfigureSPIregisters) { if (test_level < 1) { puts("\tIGNORED LEVEL 1 TEST ***** SET_SPI_Registers"); return; } __SaveAndResetUserReg(); WatchDataClass<unsigned short> spi_reg(4, pSPI_BAUD, pSPI_CTL, pSPI_FLG, pSPI_STAT); WATCH_MEMORY_RANGE(spi_reg, (Set_SPIregisters_ASM(BAUD_SCALE)), READ_CHECK | WRITE_CHECK); // Warning – many of the SPI_STAT bits are W1C – write 1 to clear – DON”T write 0’s USHORTS_EQUAL(spi_reg.getFinalValue(0), BAUD_SCALE); USHORTS_EQUAL((spi_reg.getStartValue(1) | 0x01 | SPE | MSTR | CPOL | CPHA | SIZE), spi_reg.getFinalValue(1)); USHORTS_EQUAL((spi_reg.getStartValue(2) | FLS5), spi_reg.getFinalValue(2)); USHORTS_EQUAL(spi_reg.getStartValue(3), 1); // Reset value is 1 CHECK(spi_reg.getReadsWrites() == 5); __RestoreUserReg(); 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

SPI Tests – use of the interface EX_INTERRUPT_HANDLER(spi_ISR); TEST(WriteSPIValue, ConfigureSPIregisters) { if (test_level < 2) { puts("\tIGNORED LEVEL 2 TEST ***** WriteSPIValue"); return; } __SaveAndResetUserReg(); Set_SPIregisters_ASM(0x800); Set_SIC_IMASK_ASM(0x2000); WriteSPI(0x0A); // Connect SPI interface to LED’s on logic station WriteSPI(0xFF05); // Values should be there WriteSPI(0x0F0F); // Look at values on MOSI line with scope __RestoreUserReg(); // Values should be there 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

Master / Slave concept Master to Slave data movement Master sends out information to slave on MOSI wire Slave receives information from the master on MOSI wire SLAVE IGNORES INFORMATION UNLESS SLAVE SELECT LINE IS ACTIVE Information (bits) is clocked by SCLK signal. 1-bit, 1 clock tick MOSI --MASTER OUT – SLAVE IN 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

Now at the stage where we can do some experimenting with the hardware We know that the following pins are “key” to the operation of the interface. Place scope probes on these lines MOSI – this will show the data being transmitted from the SPI interface PF5 – chip select line When this is pulled low, then the slave will accept any data being transmitted, otherwise data is ignored When this goes – low to high – then the serial data transmitted to the slave is “latched” (converted into a parallel signal that is then sent to LCD as a data or a command request. 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

Known facts -- MOSI data is transmitted from Blackfin the moment that data is written to SPI_TDBR Blackfin Processor SLAVE SELECT PF5 used (PF0 to PF7) SPI CLOCK MOSI MISO SLAVE OUTPUT INTERFACE SLAVE INPUT INTERFACE LOAD Slave to LCD DATA SWITCHES (LOGIC LAB) CONTROL LCD SCREEN 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

Known facts -- MOSI data is accepted by the SLAVE if slave-select is active low – PF5 is low – Master/Slave Blackfin Processor SLAVE SELECT PF5 used (PF0 to PF7) SPI CLOCK MOSI MISO SLAVE OUTPUT INTERFACE SLAVE INPUT INTERFACE LOAD Slave to LCD DATA SWITCHES (LOGIC LAB) CONTROL LCD SCREEN 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

Known facts – The SLAVE only sends the data to the LCD when the PF5 line goes from low to high – interface design Blackfin Processor SLAVE SELECT PF5 used (PF0 to PF7) SPI CLOCK MOSI MISO SLAVE OUTPUT INTERFACE SLAVE INPUT INTERFACE LOAD Slave to LCD DATA SWITCHES (LOGIC LAB) CONTROL LCD SCREEN 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada Concept We write 16-bits (0xFF0A) in SPI_TDBR Hardware transfers this to SHIFT register SPI_TDBR now empty For next 16 ticks of SPI clock Hardware sends out 1 bit from shift register over MOSI line to SLAVE each clock tick – speeds up to 25 MHz per bit Hardware receives 1 bit over MISO line from the SLAVE and puts into shift register each clock tick – speeds up to 25 MHz per bit Hardware transfers shift register value (from slave) into SPI_RDBR (receive DBR) SPI_RDBR is now FULL This transmission over a serial line (16-bits 1 at a time) is much slower than other internal Blackfin operation Must be handled via interrupt control 0x F F 0 A 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

Solution from last lecture Not going to work – no PF5 action ClearScreen( ) { WriteSPI(0x0001); } WriteLetter(char letter) {WriteSPI(0x0200 | letter); Call CursorMoveASM} volatile bool transmit_empty; volatile ushort transmit_value; EX_INTERRUPT_HANDLER(SPI_ISR) { SPI_TDBR  transmit_value;  ASM component transmit_empty = true; Clear the interrupt signal so don’t re-enter ISR // happens automatically when we write to SPI_TDBR; } WriteSPI(ushort value ) { while (transmit_empty = = false) /* wait for any old signal */ ; transmit_empty = false; transmit_value  value; // transmit value ActivateInterrupt( ); } 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

Things we DO and DON’T want to happen PF HIGH SLAVE IGNORES BLACKFIN PF LOW SLAVE LISTENS TO BLACKFIN PF5 line SLAVE SENDS COMMAND TO LCD MOSI signal 3 words transmitted WORD 1 RECEIVED BY SLAVE BUT NOT SENT ONTO LCD WORD 2 RECEIVED BY SLAVE AND SENT TO LCD WORD 3 IGNORED BY SLAVE AND NOT SENT ONTO LCD 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

SPI_registers -- Hardware Chap. 10 SPI_FLG (Not SPI_FLAG) FLS5 bit – activates PF5 as slave select line FLG5 bit -- control value of PF5 line when FLG5 bit is low, PF5 output is low, when FLG5 bit is high, PF5 output is high, void ControlFLG5_ASM(low) Low = true – FLG5 low Low = false – FLG5 high void WaitWhileSPIF_ASM(low / high) Wait while SPI low (not finished) 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada Improved Solution Previous Solution WriteSPI(ushort value ) while (transmit_empty = = false) /* wait for any old signal transmit_empty = false; transmit_value  value; // transmit value ActivateInterrupt( ); } EX_INTERRUPT_HANDLER(SPI_ISR) { // Clears interrupt when writing SPI_TDBR  transmit_value; // Tell the waiting program that interrupt // has occurred transmit_empty = true; New Solution WriteSPI(ushort value ) while (transmit_empty = = false) /* wait for any old signal transmit_empty = false; transmit_value  value; // transmit value ControlFLG5_ASM(low) ActivateInterrupt( ); while (transmit_empty = = false); TurnOffInterrupt( ); WaitWhileSPIF_ASM(low); ControlFLG5_ASM(high); } 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

WORD 1 RECEIVED BY SLAVE BUT NOT SENT ONTO LCD PF5 line MOSI signal 3 words transmitted WORD 1 RECEIVED BY SLAVE BUT NOT SENT ONTO LCD WORD 2 RECEIVED BY SLAVE AND SENT TO LCD WORD 3 IGNORED BY SLAVE AND NOT SENT ONTO LCD 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada Turned out to be a typical ENCM415 error – SPIF signal – slower than expected New Solution WriteSPI(ushort value ) while (transmit_empty = = false) /* wait for any old signal transmit_empty = false; transmit_value  value; // transmit value ControlFLG5_ASM(low) ActivateInterrupt( ); while (transmit_empty = = false); TurnOffInterrupt( ); WaitWhileSPIF(low); ControlFLG5_ASM(low); } New Solution WriteSPI(ushort value ) while (transmit_empty = = false) /* wait for any old signal transmit_empty = false; transmit_value  value; // transmit value ControlFLG5_ASM(low) ActivateInterrupt( ); while (transmit_empty = = false); TurnOffInterrupt( ); // SPIF does not change // to low immediately WaitWhileSPIF_ASM(high); WaitWhileSPIF_ASM(low); ControlFLG5_ASM(low); } 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

WORD 1 RECEIVED BY SLAVE BUT NOT SENT ONTO LCD If look at signal with an “ultra-high-speed” scope then can see PF line go high for “a very short period of time”. Blackfin is “too fast” for interface PF5 line MOSI signal 2 words transmitted WORD 1 RECEIVED BY SLAVE BUT NOT SENT ONTO LCD WORD 2 RECEIVED BY SLAVE AND SENT TO LCD 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

Final “working solution” – but not ideal EX_INTERRUPT_HANDLER(SPI_ISR) { // Clears interrupt when writing Write_SPI_TDBR_ASM(transmit_value); // Tell the waiting program that interrupt // has occurred transmit_empty = true; } NOTE Write_SPI_TDBR_ASM( ) is a “normal” function called from inside an ISR New Solution WriteSPI(ushort value ) while (transmit_empty = = false) /* wait for any old signal transmit_empty = false; transmit_value  value; // transmit value ControlFLG5_ASM(low) ActivateInterrupt( ); while (transmit_empty = = false); TurnOffInterrupt( ); // SPIF does not change // to low immediately WaitWhileSPIF_ASM(high); WaitWhileSPIF_ASM(low); ControlFLG5_ASM(low); UseFixedTimeASM(0x2000); // If speed is a problem // then could be adjusted until // “only just enough time} 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

WORD 1 RECEIVED BY SLAVE AND SENT ONTO LCD VALUES GOING TO LCD WORD 1 RECEIVED BY SLAVE AND SENT ONTO LCD WORD 2 RECEIVED BY SLAVE AND SENT TO LCD WORD 3 RECEIVED BY SLAVE AND SENT ONTO LCD 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

Questions still unanswered How do we configure the SPI interface inside the Blackfin? How do we activate the chip-select line – PF5? Does activating the PF5 line as SPI output control mean we have to change all the SetupPF8to11ASM( ) and other routines? When do we activate the chip-select line, and how long for? Examine output from SPI interface using logic lab LED’s How do we know when LCD is ready for next character – do we poll a bit and wait till ready, or can it be done in the background? How do we stop multiple commands from being accidentally sent to LCD? -- cursor move etc 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

Functions you have time to write now for Lab. 5 void Write_SPI_TDBR_ASM(ushort transmit_value); Write the value “transmit_value” to SPI TDBR register void ControlFLG5_ASM(ushort low_or_high) Activates FLS5 (select flag 5 bit) Sets FLG5 bit high or low as requested void WaitWhileSPIF_ASM(ushort low_or_high); Waits will SPI_STAT SPIF flag is low or high void Set_SPIregisters_ASM(ushort BAUD_SCALE) void Set_SIC_IMASK_ASM(ulong bit_to_set); 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada To be tackled today Steps on the way to getting a reliable interface for writing values from Blackfin to high speed serial device Questions still unanswered 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada

SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada Information taken from Analog Devices On-line Manuals with permission http://www.analog.com/processors/resources/technicalLibrary/manuals/ Information furnished by Analog Devices is believed to be accurate and reliable. However, Analog Devices assumes no responsibility for its use or for any infringement of any patent other rights of any third party which may result from its use. No license is granted by implication or otherwise under any patent or patent right of Analog Devices. Copyright  Analog Devices, Inc. All rights reserved. 5/8/2019 SPI and LCD , Copyright M. Smith, ECE, University of Calgary, Canada