II. Linear Block Codes

Last Lecture What are Linear Block Codes? Linear Systematic Block Codes Generator Matrix and Encoding Process Parity Check Matrix, Syndrome & Error Detection Process Encoding Circuit & Syndrome Circuit

Hamming Weight and Hamming Distance Hamming Weight w(v): The number of nonzero components of v Hamming Distance d(v,w): The number of places where v and w differ Example: v= (1 0 1 1 1 0 1): w(v)=5 w=(0 1 1 0 1 0 1): d(v,w)=3 Important Remark: In GF(2) d(v,w)=w(v+w) In the example above v+w=(1 1 0 1 0 0 0)

Minimum Distance of a Block Code Minimum Distance of a block code (dmin): The minimum Hamming distance between any two code words in the code book of the block code For Linear Block Codes

Theorem Let C be an (n,k) linear block code with parity check matrix H. For each code word of Hamming weight l, there exists l columns of H such that the vector sum of these l columns is equal to the zero vector. PROOF:

Theorem (Cont’d) Conversely, if there exists l columns of H whose vector sum is the zero vector, there exists a codeword of Hamming weight l in C. PROOF:

Corollaries Given C is a linear block code with parity check matrix H. If no d-1 or fewer columns of H add to 0, the code has minimum weight of at least d. Given C is a linear block code with parity check matrix H. The minimum distance of C is equal to the smallest number of columns of H that sum to 0.

Example (7,4) Linear Block Code No all 0 column. No two columns are identical: dmin>2 Columns 0, 1, 3 sum to zero vector dmin=3

Error Detection Error Detection Capability means: HOW MANY ERRORS ARE GUARANTEED TO BE DETECTED AT THE RECEIVER SIDE TWO Possibilities: Number of errors (no. of 1s in e) is smaller than dmin Number of errors (no. of 1s in e) is greater than dmin v r Channel e You could be absolutely sure that r is not a valid codeword. There is a chance that r is a valid codeword (if e is a valid code word) v: transmitted codeword e: error pattern caused by channel r: received pattern If error pattern includes l errors: d(v,r)=l THE ERROR IS GUARANTEED TO BE DETECTED THE ERROR PATTERN MIGHT NOT BE DETECTED

Error Detection Capability The “Error Detection Capability” of a code defines the number of errors that are GUARANTEED to be detected. For a code with minimum Hamming distance dmin: The error detection capability is dmin-1

Number of Detectable Error Patterns An error pattern is defined as any nonzero n-tuple that could affect a transmitted code word. For an (n,k) code: There are 2n-1 error patterns. Note that (0 0 0 . . . 0) is not an error pattern There are 2k-1 undetectable error patterns. Note that (0 0 0 . . . 0) is selected to be a valid codeword An (n,k) code has the ability to detect 2n-2k error patterns Example: A (7,4) code is able to detect: 128-16=112 error patterns

Error Correction Capability The “error correction capability” defines the number of errors that are GUARANTEED to be corrected. For a code with minimum Hamming distance dmin: The error correction capability is (dmin-1)/2 x means floor(x)

Error Correction Capability: Proof Assume a Block Code with dmin Define a Positive Integer t such that: v r Channel e v: transmitted codeword e: error pattern caused by channel r: received pattern Assume w is also a valid codeword in C Triangle Inequality: Assume an error pattern with t’ errors Given that v and w are codewords i.e., if an error pattern of t or fewer errors occur, the received vector r MUST BE closer to v than to any other codeword in C If t’≤t

Error Correction & Error Detection Capability Some codes are designed such that they can GUARANTEE correction of λ or fewer errors AND detection of up to l>λ For a code with minimum Hamming distance dmin: If the code could correct λ and detect up to l then dmin≥ λ+l+1 Example: If it is required for a code to correct 3 errors AND detect up to 6 errors then dmin must satisfy: dmin ≥10 Notes: In the example above, If the number of errors are 3 or less: you can provide a GUARNTEE to correct all of them. If the number of errors are from 4 to 6: you can provide a GUARNTEE to detect that the number of errors are between 4 to 6 without being able to correct ANY of them. If the number of errors are greater than 6: there is NO GUARANTEE that you would be able to detect or correct the errors

Quantization and Analogy to Error Correction and Detection Operation Correct Reception: The value received is identical to what has been transmitted Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 v*0=0 v*1=1 v*2=2 v*3=3 Channel

Quantization and Analogy to Error Correction and Detection Operation Error Detection: The value received IS NOT EQUAL to any of the valid representation levels ARQ: Request retransmission Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 v*0=0 v*1=1 v*2=2 v*3=3 Channel

Quantization and Analogy to Error Correction and Detection Operation Error Detection: The value received IS NOT EQUAL to any of the valid representation levels ARQ: Request retransmission Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 v*0=0 v*1=1 v*2=2 v*3=3 Channel

Quantization and Analogy to Error Correction and Detection Operation Un-Detected Errors: The value received IS a valid representation level. However, it is NOT what has been transmitted Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 v*0=0 v*1=1 v*2=2 v*3=3 Channel

Quantization and Analogy to Error Correction and Detection Operation Approximate the received value to the closest valid representation level. FEC: The receiver defines decision zones and maps ANY received value to a valid representation level. ARQ cannot be applied Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 D0 D1 D2 D3 v*0=0 v*1=1 v*2=2 v*3=3 Channel

Quantization and Analogy to Error Correction and Detection Operation Approximate the received value to the closest valid representation level. FEC: The receiver defines decision zones and maps ANY received value to a valid representation level. ARQ cannot be applied Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 v*0=0 v*1=1 v*2=2 v*3=3 D0 D1 D2 D3 Channel

Quantization and Analogy to Error Correction and Detection Operation False Correction: The error pushes the received value outside the decision zone of the representation level that has been transmitted. Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 v*0=0 v*1=1 v*2=2 v*3=3 D0 D1 D2 D3 Channel

Quantization and Analogy to Error Correction and Detection Operation False Correction: The error pushes the received value outside the decision zone of the representation level that has been transmitted. Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 v*0=0 v*1=1 v*2=2 v*3=3 D0 D1 D2 D3 Channel

Quantization and Analogy to Error Correction and Detection Operation Error Correction and Error Detection: Defines two types of decision zone such that both FEC and ARQ could be used dependent on the received value Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 D0 D1 D2 D3 v*0=0 v*1=1 v*2=2 v*3=3 Channel

Quantization and Analogy to Error Correction and Detection Operation Error Correction and Error Detection: Defines two types of decision zone such that both FEC and ARQ could be used dependent on the received value Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 v*0=0 v*1=1 v*2=2 v*3=3 D0 D1 D2 D3 Channel Error Correction

Quantization and Analogy to Error Correction and Detection Operation Error Correction and Error Detection: Defines two types of decision zone such that both FEC and ARQ could be used dependent on the received value Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 v*0=0 v*1=1 v*2=2 v*3=3 D0 D1 D2 D3 Channel

Quantization and Analogy to Error Correction and Detection Operation Error Correction and Error Detection: Defines two types of decision zone such that both FEC and ARQ could be used dependent on the received value Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 v*0=0 v*1=1 v*2=2 v*3=3 D0 D1 D2 D3 Channel False Error Correction

Quantization and Analogy to Error Correction and Detection Operation Error Correction and Error Detection: Defines two types of decision zone such that both FEC and ARQ could be used dependent on the received value Transmitter Side Receiver Side v0=0 v1=1 v2=2 v3=3 v*0=0 v*1=1 v*2=2 v*3=3 D0 D1 D2 D3 Channel Error Detection and ARQ could be used